Module dma 

DMA driver for MCXA276.

This module provides a typed channel abstraction over the EDMA_0_TCD0 array and helpers for configuring the channel MUX. The driver supports both low-level TCD configuration and higher-level async transfer APIs.

Architecture

The MCXA276 has 8 DMA channels (0-7), each with its own interrupt vector. Each channel has a Transfer Control Descriptor (TCD) that defines the transfer parameters.

Choosing the Right API

This module provides several API levels to match different use cases:

High-Level Async API (Recommended for Most Users)

Use the async methods when you want simple, safe DMA transfers:

Method	Description
DmaChannel::mem_to_mem()	Memory-to-memory copy
DmaChannel::memset()	Fill memory with a pattern
DmaChannel::write()	Memory-to-peripheral (TX)
DmaChannel::read()	Peripheral-to-memory (RX)

These return a Transfer future that can be .awaited:

// Simple memory-to-memory transfer
unsafe {
    dma_ch.mem_to_mem(&src, &mut dst, TransferOptions::default()).await;
}

Setup Methods (For Peripheral Drivers)

Use setup methods when you need manual lifecycle control:

Method	Description
DmaChannel::setup_write()	Configure TX without starting
DmaChannel::setup_read()	Configure RX without starting

These configure the TCD but don’t start the transfer. You control:

1. When to call DmaChannel::enable_request()
2. How to detect completion (polling or interrupts)
3. When to clean up with DmaChannel::clear_done()

Circular/Ring Buffer API (For Continuous Reception)

Use DmaChannel::setup_circular_read() for continuous data reception:

static mut RX_BUF: [u8; 64] = [0; 64];

let ring_buf = unsafe {
    dma_ch.setup_circular_read(uart_rx_addr, &mut RX_BUF)
};

// Read data as it arrives
let mut buf = [0u8; 16];
let n = ring_buf.read(&mut buf).await.unwrap();

Scatter-Gather Builder (For Chained Transfers)

Use ScatterGatherBuilder for complex multi-segment transfers:

let mut builder = ScatterGatherBuilder::<u32>::new();
builder.add_transfer(&src1, &mut dst1);
builder.add_transfer(&src2, &mut dst2);

let transfer = unsafe { builder.build(&dma_ch).unwrap() };
transfer.await;

Direct TCD Access (For Advanced Use Cases)

For full control, use the channel’s tcd() method to access TCD registers directly. See the dma_* examples for patterns.

Example

use embassy_mcxa::dma::{DmaChannel, TransferOptions, Direction};

let dma_ch = DmaChannel::new(p.DMA_CH0);
// Configure and trigger a transfer...

Structs

AnyChannel

Type-erased DMA channel.

DmaChannel

Strongly-typed handle to a DMA0 channel.

Lpuart0RxRequest

DMA request source for LPUART0 RX.

Lpuart0TxRequest

DMA request source for LPUART0 TX.

Lpuart1RxRequest

DMA request source for LPUART1 RX.

Lpuart1TxRequest

DMA request source for LPUART1 TX.

Lpuart2RxRequest

DMA request source for LPUART2 RX.

Lpuart2TxRequest

DMA request source for LPUART2 TX.

Lpuart3RxRequest

DMA request source for LPUART3 RX.

Lpuart3TxRequest

DMA request source for LPUART3 TX.

Lpuart4RxRequest

DMA request source for LPUART4 RX.

Lpuart4TxRequest

DMA request source for LPUART4 TX.

Lpuart5RxRequest

DMA request source for LPUART5 RX.

Lpuart5TxRequest

DMA request source for LPUART5 TX.

RingBuffer

A ring buffer for continuous DMA reception.

ScatterGatherBuilder

A builder for constructing scatter-gather DMA transfer chains.

ScatterGatherResult

A completed scatter-gather transfer result.

Tcd

In-memory representation of a Transfer Control Descriptor (TCD).

Transfer

An in-progress DMA transfer.

TransferErrorRaw

Raw transfer error bits. Can be queried or all errors can be iterated over

TransferErrorRawIter

TransferOptions

DMA transfer options.

Enums

Direction

DMA transfer direction.

EnableInterrupt

Whether to enable the major loop completion interrupt.

Error

DMA error types.

Priority

DMA transfer priority.

TransferError

WordSize

DMA transfer data width.

Constants

DMA_MAX_TRANSFER_SIZE

Maximum bytes per DMA transfer (eDMA4 CITER/BITER are 15-bit fields).

MAX_SCATTER_GATHER_TCDS

Maximum number of TCDs in a scatter-gather chain.

Traits

Channel

Marker trait implemented by HAL peripheral tokens that map to a DMA0 channel backed by one EDMA_0_TCD0 TCD slot.

DmaRequest

Trait for type-safe DMA request sources.

Word

Trait for types that can be transferred via DMA.

Functions

on_interrupt^⚠

Interrupt handler helper.