Expand description
Type-level interrupt infrastructure.
This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.
As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts!
macro
to bind interrupts, and the [crate::interrupt
] module to manually register interrupt handlers and manipulate
interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)
Enums§
- AAR_CCM typelevel interrupt.
- CLOCK_POWER typelevel interrupt.
- COMP_LPCOMP typelevel interrupt.
- ECB typelevel interrupt.
- EGU0_SWI0 typelevel interrupt.
- EGU1_SWI1 typelevel interrupt.
- EGU2_SWI2 typelevel interrupt.
- EGU3_SWI3 typelevel interrupt.
- EGU4_SWI4 typelevel interrupt.
- EGU5_SWI5 typelevel interrupt.
- FPU typelevel interrupt.
- GPIOTE typelevel interrupt.
- I2S typelevel interrupt.
- MWU typelevel interrupt.
- NFCT typelevel interrupt.
- PDM typelevel interrupt.
- PWM0 typelevel interrupt.
- PWM1 typelevel interrupt.
- PWM2 typelevel interrupt.
- QDEC typelevel interrupt.
- RADIO typelevel interrupt.
- RNG typelevel interrupt.
- RTC0 typelevel interrupt.
- RTC1 typelevel interrupt.
- RTC2 typelevel interrupt.
- SAADC typelevel interrupt.
- SPI2 typelevel interrupt.
- TEMP typelevel interrupt.
- TIMER0 typelevel interrupt.
- TIMER1 typelevel interrupt.
- TIMER2 typelevel interrupt.
- TIMER3 typelevel interrupt.
- TIMER4 typelevel interrupt.
- TWISPI0 typelevel interrupt.
- TWISPI1 typelevel interrupt.
- UARTE0 typelevel interrupt.
- WDT typelevel interrupt.
Traits§
- Compile-time assertion that an interrupt has been bound to a handler.
- Interrupt handler trait.
- Type-level interrupt.