Indicates the current level of tracing permitted by the system
Software can use the claim tag to coordinate application and debugger access to trace unit functionality. The claim tags have no effect on the operation of the component. The CLAIMCLR register sets the bits in the claim tag to 0 and determines the current value of the claim tag.
Software can use the claim tag to coordinate application and debugger access to trace unit functionality. The claim tags have no effect on the operation of the component. The CLAIMSET register sets bits in the claim tag, and determines the number of claim bits implemented.
Each bit location is a single port size. One bit can be set, and indicates the current port size.
Current_test_pattern_mode indicates the current test pattern or mode selected.
Indicates the capabilities of the component.
The DEVTYPE register provides a debugger with information about the component when the Part Number field is not recognized. The debugger can then report this information.
Two ports can be used as a control and feedback mechanism for any serializers, pin sharing multiplexers, or other solutions that might be added to the trace output pins either for pin control or a high-speed trace port solution.
Two ports can be used as a control and feedback mechanism for any serializers, pin sharing multiplexers, or other solutions that might be added to the trace output pins either for pin control or a high speed trace port solution. These ports are raw register banks that sample or export the corresponding external pins.
The FFCR register controls the generation of stop, trigger, and flush events.
The FFSR register indicates the current status of the formatter and flush features available in the TPIU.
The FSCR register enables the frequency of synchronization information to be optimized to suit the Trace Port Analyzer (TPA) capture buffer size.
The ITATBCTR0 register captures the values of the atvalids, afreadys, and atbytess inputs to the TPIU. To ensure the integration registers work correctly in a system, the value of atbytess is only valid when atvalids, bit[0], is HIGH.
The ITATBCTR1 register contains the value of the atids input to the TPIU. This is only valid when atvalids is HIGH.
Enables control of the atreadys and afvalids outputs of the TPIU.
The ITATBDATA0 register contains the value of the atdatas inputs to the TPIU. The values are valid only when atvalids is HIGH.
Used to enable topology detection. This register enables the component to switch from a functional mode, the default behavior, to integration mode where the inputs and outputs of the component can be directly controlled for integration testing and topology solving.
The ITTRFLIN register contains the values of the flushin and trigin inputs to the TPIU.
The ITTRFLINACK register enables control of the triginack and flushinack outputs from the TPIU.
This is used to enable write access to device registers.
This indicates the status of the lock control mechanism. This lock prevents accidental writes by code under debug. Accesses to the extended stimulus port registers are not affected by the lock mechanism. This register must always be present although there might not be any lock access control mechanism. The lock mechanism, where present and locked, must block write accesses to any control register, except the Lock Access Register. For most components this covers all registers except for the Lock Access Register.
Each bit location is a single port size that is supported on the device.
The Supported_trigger_modes register indicates the implemented trigger counter multipliers and other supported features of the trigger system.
The Supported_test_pattern_modes register provides a set of known bit sequences or patterns that can be output over the trace port and can be detected by the TPA or other associated trace capture device.
The TPRCR register is an 8-bit counter start value that is decremented. A write sets the initial counter value and a read returns the programmed value.
The Trigger_counter_value register enables delaying the indication of triggers to any external connected trace capture or storage devices.
The Trigger_multiplier register contains the selectors for the trigger counter multiplier.