Module regs

Structs

• Baudrate
  Baud rate. Accuracy depends on the HFCLK source selected.
• Config
  Configuration of parity and hardware flow control
• Enable
  Enable UART
• Errorsrc
  Error source This register is read/write one to clear.
• Int
  Enable or disable interrupt
• RxdAmount
  Number of bytes transferred in the last transaction
• RxdMaxcnt
  Maximum number of bytes in receive buffer
• Shorts
  Shortcuts between local events and tasks
• TxdAmount
  Number of bytes transferred in the last transaction
• TxdMaxcnt
  Maximum number of bytes in transmit buffer