Expand description
Peripheral Access Crate
Re-exports§
pub use nrf_pac::CC_HOST_RGF_S as CC_HOST_RGF;
pub use nrf_pac::CLOCK_S as CLOCK;
pub use nrf_pac::CRYPTOCELL_S as CRYPTOCELL;
pub use nrf_pac::CTRL_AP_PERI_S as CTRL_AP_PERI;
pub use nrf_pac::DPPIC_S as DPPIC;
pub use nrf_pac::EGU0_S as EGU0;
pub use nrf_pac::EGU1_S as EGU1;
pub use nrf_pac::EGU2_S as EGU2;
pub use nrf_pac::EGU3_S as EGU3;
pub use nrf_pac::EGU4_S as EGU4;
pub use nrf_pac::EGU5_S as EGU5;
pub use nrf_pac::FICR_S as FICR;
pub use nrf_pac::FPU_S as FPU;
pub use nrf_pac::GPIOTE0_S as GPIOTE0;
pub use nrf_pac::I2S_S as I2S;
pub use nrf_pac::IPC_S as IPC;
pub use nrf_pac::KMU_S as KMU;
pub use nrf_pac::NVMC_S as NVMC;
pub use nrf_pac::P0_S as P0;
pub use nrf_pac::PDM_S as PDM;
pub use nrf_pac::POWER_S as POWER;
pub use nrf_pac::PWM0_S as PWM0;
pub use nrf_pac::PWM1_S as PWM1;
pub use nrf_pac::PWM2_S as PWM2;
pub use nrf_pac::PWM3_S as PWM3;
pub use nrf_pac::REGULATORS_S as REGULATORS;
pub use nrf_pac::RTC0_S as RTC0;
pub use nrf_pac::RTC1_S as RTC1;
pub use nrf_pac::SAADC_S as SAADC;
pub use nrf_pac::SPIM0_S as SPIM0;
pub use nrf_pac::SPIM1_S as SPIM1;
pub use nrf_pac::SPIM2_S as SPIM2;
pub use nrf_pac::SPIM3_S as SPIM3;
pub use nrf_pac::SPIS0_S as SPIS0;
pub use nrf_pac::SPIS1_S as SPIS1;
pub use nrf_pac::SPIS2_S as SPIS2;
pub use nrf_pac::SPIS3_S as SPIS3;
pub use nrf_pac::SPU_S as SPU;
pub use nrf_pac::TAD_S as TAD;
pub use nrf_pac::TIMER0_S as TIMER0;
pub use nrf_pac::TIMER1_S as TIMER1;
pub use nrf_pac::TIMER2_S as TIMER2;
pub use nrf_pac::TWIM0_S as TWIM0;
pub use nrf_pac::TWIM1_S as TWIM1;
pub use nrf_pac::TWIM2_S as TWIM2;
pub use nrf_pac::TWIM3_S as TWIM3;
pub use nrf_pac::TWIS0_S as TWIS0;
pub use nrf_pac::TWIS1_S as TWIS1;
pub use nrf_pac::TWIS2_S as TWIS2;
pub use nrf_pac::TWIS3_S as TWIS3;
pub use nrf_pac::UARTE0_S as UARTE0;
pub use nrf_pac::UARTE1_S as UARTE1;
pub use nrf_pac::UARTE2_S as UARTE2;
pub use nrf_pac::UARTE3_S as UARTE3;
pub use nrf_pac::UICR_S as UICR;
pub use nrf_pac::VMC_S as VMC;
pub use nrf_pac::WDT_S as WDT;
Modules§
Enums§
Constants§
- CRYPTOCELL HOST_RGF interface
- Clock management 0
- Clock management 1
- ARM TrustZone CryptoCell register interface
- Control access port
- Distributed programmable peripheral interconnect controller 0
- Distributed programmable peripheral interconnect controller 1
- Event generator unit 0
- Event generator unit 1
- Event generator unit 2
- Event generator unit 3
- Event generator unit 4
- Event generator unit 5
- Event generator unit 6
- Event generator unit 7
- Event generator unit 8
- Event generator unit 9
- Event generator unit 10
- Event generator unit 11
- Factory Information Configuration Registers
- FPU 0
- FPU 1
- GPIO Tasks and Events 0
- GPIO Tasks and Events 1
- Inter-IC Sound 0
- Inter-IC Sound 1
- Interprocessor communication 0
- Interprocessor communication 1
- Key management unit 0
- Key management unit 1
- Number available in the NVIC for configuring priority
- Non-volatile memory controller 0
- Non-volatile memory controller 1
- GPIO Port 0
- GPIO Port 1
- Pulse Density Modulation (Digital Microphone) Interface 0
- Pulse Density Modulation (Digital Microphone) Interface 1
- Power control 0
- Power control 1
- Pulse width modulation unit 0
- Pulse width modulation unit 1
- Pulse width modulation unit 2
- Pulse width modulation unit 3
- Pulse width modulation unit 4
- Pulse width modulation unit 5
- Pulse width modulation unit 6
- Pulse width modulation unit 7
- Voltage regulators control 0
- Voltage regulators control 1
- Real-time counter 0
- Real-time counter 1
- Real-time counter 2
- Real-time counter 3
- Analog to Digital Converter 0
- Analog to Digital Converter 1
- Serial Peripheral Interface Master with EasyDMA 0
- Serial Peripheral Interface Master with EasyDMA 1
- Serial Peripheral Interface Master with EasyDMA 2
- Serial Peripheral Interface Master with EasyDMA 3
- Serial Peripheral Interface Master with EasyDMA 4
- Serial Peripheral Interface Master with EasyDMA 5
- Serial Peripheral Interface Master with EasyDMA 6
- Serial Peripheral Interface Master with EasyDMA 7
- SPI Slave 0
- SPI Slave 1
- SPI Slave 2
- SPI Slave 3
- SPI Slave 4
- SPI Slave 5
- SPI Slave 6
- SPI Slave 7
- System protection unit
- Trace and debug control
- Timer/Counter 0
- Timer/Counter 1
- Timer/Counter 2
- Timer/Counter 3
- Timer/Counter 4
- Timer/Counter 5
- I2C compatible Two-Wire Master Interface with EasyDMA 0
- I2C compatible Two-Wire Master Interface with EasyDMA 1
- I2C compatible Two-Wire Master Interface with EasyDMA 2
- I2C compatible Two-Wire Master Interface with EasyDMA 3
- I2C compatible Two-Wire Master Interface with EasyDMA 4
- I2C compatible Two-Wire Master Interface with EasyDMA 5
- I2C compatible Two-Wire Master Interface with EasyDMA 6
- I2C compatible Two-Wire Master Interface with EasyDMA 7
- I2C compatible Two-Wire Slave Interface with EasyDMA 0
- I2C compatible Two-Wire Slave Interface with EasyDMA 1
- I2C compatible Two-Wire Slave Interface with EasyDMA 2
- I2C compatible Two-Wire Slave Interface with EasyDMA 3
- I2C compatible Two-Wire Slave Interface with EasyDMA 4
- I2C compatible Two-Wire Slave Interface with EasyDMA 5
- I2C compatible Two-Wire Slave Interface with EasyDMA 6
- I2C compatible Two-Wire Slave Interface with EasyDMA 7
- UART with EasyDMA 0
- UART with EasyDMA 1
- UART with EasyDMA 2
- UART with EasyDMA 3
- UART with EasyDMA 4
- UART with EasyDMA 5
- UART with EasyDMA 6
- UART with EasyDMA 7
- User information configuration registers User information configuration registers
- Volatile Memory controller 0
- Volatile Memory controller 1
- Watchdog Timer 0
- Watchdog Timer 1