Expand description
Type-level interrupt infrastructure.
This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.
As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts!
macro
to bind interrupts, and the [crate::interrupt
] module to manually register interrupt handlers and manipulate
interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)
Enums§
- CLOCK_POWER typelevel interrupt.
- CRYPTOCELL typelevel interrupt.
- EGU0 typelevel interrupt.
- EGU1 typelevel interrupt.
- EGU2 typelevel interrupt.
- EGU3 typelevel interrupt.
- EGU4 typelevel interrupt.
- EGU5 typelevel interrupt.
- FPU typelevel interrupt.
- GPIOTE0 typelevel interrupt.
- GPIOTE1 typelevel interrupt.
- I2S typelevel interrupt.
- IPC typelevel interrupt.
- KMU typelevel interrupt.
- PDM typelevel interrupt.
- PWM0 typelevel interrupt.
- PWM1 typelevel interrupt.
- PWM2 typelevel interrupt.
- PWM3 typelevel interrupt.
- RTC0 typelevel interrupt.
- RTC1 typelevel interrupt.
- SAADC typelevel interrupt.
- SPIM0_SPIS0_TWIM0_TWIS0_UARTE0 typelevel interrupt.
- SPIM1_SPIS1_TWIM1_TWIS1_UARTE1 typelevel interrupt.
- SPIM2_SPIS2_TWIM2_TWIS2_UARTE2 typelevel interrupt.
- SPIM3_SPIS3_TWIM3_TWIS3_UARTE3 typelevel interrupt.
- SPU typelevel interrupt.
- TIMER0 typelevel interrupt.
- TIMER1 typelevel interrupt.
- TIMER2 typelevel interrupt.
- WDT typelevel interrupt.
Traits§
- Compile-time assertion that an interrupt has been bound to a handler.
- Interrupt handler trait.
- Type-level interrupt.