Module regs

Structs

Dbgforce

Directly control the SWD debug port of either processor

Mempowerdown

Control power downs to memories. Set high to power down memories. Use with extreme caution

ProcConfig

Configuration for processors

ProcInSyncBypass

For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 0…29.

ProcInSyncBypassHi

For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 30…35 (the QSPI IOs).