Module regs
- Ccr
- ADC common control register
- Cr1
- control register 1
- Cr2
- control register 2
- Csr
- ADC common status register
- Dr
- regular data register
- Htr
- watchdog higher threshold register
- Jdr1
- injected data register x
- Jdr2
- injected data register x
- Jdr3
- injected data register x
- Jdr4
- injected data register x
- Jofr1
- injected channel data offset register x
- Jofr2
- injected channel data offset register x
- Jofr3
- injected channel data offset register x
- Jofr4
- injected channel data offset register x
- Jsqr
- injected sequence register
- Ltr
- watchdog lower threshold register
- Smpr0
- sample time register 0
- Smpr1
- sample time register 1
- Smpr2
- sample time register 2
- Smpr3
- sample time register 3
- Sqr1
- regular sequence register 1
- Sqr2
- regular sequence register 2
- Sqr3
- regular sequence register 3
- Sqr4
- regular sequence register 4
- Sqr5
- regular sequence register 5
- Sr
- status register