Module regs

Structs

Ahbenr

RCC AHB peripheral clock enable register

Ahbrstr

RCC AHB peripheral reset register

Ahbsmenr

RCC AHB peripheral clock enable in Sleep/Stop mode register

Apbenr1

RCC APB peripheral clock enable register 1

Apbenr2

RCC APB peripheral clock enable register 2

Apbrstr1

RCC APB peripheral reset register 1

Apbrstr2

RCC APB peripheral reset register 2

Apbsmenr1

RCC APB peripheral clock enable in Sleep/Stop mode register 1

Apbsmenr2

RCC APB peripheral clock enable in Sleep/Stop mode register 2

Ccipr

RCC peripherals independent clock configuration register

Ccipr2

RCC peripherals independent clock configuration register 2.

Cfgr

RCC clock configuration register

Cicr

RCC clock interrupt clear register

Cier

RCC clock interrupt enable register

Cifr

RCC clock interrupt flag register

Cr

RCC clock control register

Crrcr

RCC clock recovery RC register.

Csr1

RCC control/status register 1

Csr2

RCC control/status register 2

Gpioenr

RCC I/O port clock enable register

Gpiorstr

RCC I/O port reset register

Gpiosmenr

RCC I/O port in Sleep mode clock enable register

Icscr

RCC internal clock source calibration register