Enum MainClockSource 

pub enum MainClockSource {
    SoscClkIn,
    SircFro12M,
    FircHfRoot,
    RoscFro16K,
    SPll1,
}

Main clock source

Variants

SoscClkIn

Clock derived from clk_in, via the external oscillator (8-50MHz)

NOTE: Requires sosc-as-gpio feature disabled, which also disables GPIO access to P1_30 and P1_31

SircFro12M

Clock derived from fro_12m, via the internal 12MHz oscillator (12MHz)

FircHfRoot

Clock derived from fro_hf_root, via the internal 45/60/90/180M clock source (45-180MHz)

RoscFro16K

Clock derived from clk_16k (vdd core)

SPll1

Clock derived from pll1_clk, via the internal PLL

Trait Implementations

impl Clone for MainClockSource

fn clone(&self) -> MainClockSource

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for MainClockSource