Module regs Copy item path Endianness This register defines the endianness of the Host-accessible registers, and can only be written once. HostBoot Hardware configuration of the CRYPTOCELL subsystem. Reset value holds the supported features. HostCcIsIdle Idle state register for the CRYPTOCELL subsystem. HostPowerdown This register start the power-down sequence. Icr Interrupt clear register. Writing a 1 bit into a field in this register will clear the corresponding bit in IRR. Imr Interrupt mask register. Each bit of this register holds the mask of a single interrupt source. Irr Interrupt request register. Each bit of this register holds the interrupt status of a single interrupt source. If corresponding IMR bit is unmasked, an interrupt is generated.