Expand description
Peripheral Access Crate
Re-exports§
pub use nrf_pac::CACHEDATA_S as CACHEDATA;pub use nrf_pac::CACHEINFO_S as CACHEINFO;pub use nrf_pac::CACHE_S as CACHE;pub use nrf_pac::CLOCK_S as CLOCK;pub use nrf_pac::COMP_S as COMP;pub use nrf_pac::CRYPTOCELL_S as CRYPTOCELL;pub use nrf_pac::CTI_S as CTI;pub use nrf_pac::CTRLAP_S as CTRLAP;pub use nrf_pac::DCNF_S as DCNF;pub use nrf_pac::DPPIC_S as DPPIC;pub use nrf_pac::EGU0_S as EGU0;pub use nrf_pac::EGU1_S as EGU1;pub use nrf_pac::EGU2_S as EGU2;pub use nrf_pac::EGU3_S as EGU3;pub use nrf_pac::EGU4_S as EGU4;pub use nrf_pac::EGU5_S as EGU5;pub use nrf_pac::FICR_S as FICR;pub use nrf_pac::FPU_S as FPU;pub use nrf_pac::GPIOTE0_S as GPIOTE0;pub use nrf_pac::I2S0_S as I2S0;pub use nrf_pac::IPC_S as IPC;pub use nrf_pac::KMU_S as KMU;pub use nrf_pac::LPCOMP_S as LPCOMP;pub use nrf_pac::MUTEX_S as MUTEX;pub use nrf_pac::NFCT_S as NFCT;pub use nrf_pac::NVMC_S as NVMC;pub use nrf_pac::OSCILLATORS_S as OSCILLATORS;pub use nrf_pac::P0_S as P0;pub use nrf_pac::P1_S as P1;pub use nrf_pac::PDM0_S as PDM0;pub use nrf_pac::POWER_S as POWER;pub use nrf_pac::PWM0_S as PWM0;pub use nrf_pac::PWM1_S as PWM1;pub use nrf_pac::PWM2_S as PWM2;pub use nrf_pac::PWM3_S as PWM3;pub use nrf_pac::QDEC0_S as QDEC0;pub use nrf_pac::QDEC1_S as QDEC1;pub use nrf_pac::QSPI_S as QSPI;pub use nrf_pac::REGULATORS_S as REGULATORS;pub use nrf_pac::RESET_S as RESET;pub use nrf_pac::RTC0_S as RTC0;pub use nrf_pac::RTC1_S as RTC1;pub use nrf_pac::SAADC_S as SAADC;pub use nrf_pac::SPIM0_S as SPIM0;pub use nrf_pac::SPIM1_S as SPIM1;pub use nrf_pac::SPIM2_S as SPIM2;pub use nrf_pac::SPIM3_S as SPIM3;pub use nrf_pac::SPIM4_S as SPIM4;pub use nrf_pac::SPIS0_S as SPIS0;pub use nrf_pac::SPIS1_S as SPIS1;pub use nrf_pac::SPIS2_S as SPIS2;pub use nrf_pac::SPIS3_S as SPIS3;pub use nrf_pac::SPU_S as SPU;pub use nrf_pac::TAD_S as TAD;pub use nrf_pac::TIMER0_S as TIMER0;pub use nrf_pac::TIMER1_S as TIMER1;pub use nrf_pac::TIMER2_S as TIMER2;pub use nrf_pac::TWIM0_S as TWIM0;pub use nrf_pac::TWIM1_S as TWIM1;pub use nrf_pac::TWIM2_S as TWIM2;pub use nrf_pac::TWIM3_S as TWIM3;pub use nrf_pac::TWIS0_S as TWIS0;pub use nrf_pac::TWIS1_S as TWIS1;pub use nrf_pac::TWIS2_S as TWIS2;pub use nrf_pac::TWIS3_S as TWIS3;pub use nrf_pac::UARTE0_S as UARTE0;pub use nrf_pac::UARTE1_S as UARTE1;pub use nrf_pac::UARTE2_S as UARTE2;pub use nrf_pac::UARTE3_S as UARTE3;pub use nrf_pac::UICR_S as UICR;pub use nrf_pac::USBD_S as USBD;pub use nrf_pac::USBREGULATOR_S as USBREGULATOR;pub use nrf_pac::VMC_S as VMC;pub use nrf_pac::WDT0_S as WDT0;pub use nrf_pac::WDT1_S as WDT1;
Modules§
- cache
- cachedata
- cacheinfo
- clock
- common
- comp
- cryptocell
- cti
- ctrlapperi
- dcnf
- dppic
- egu
- ficr
- fpu
- gpio
- gpiote
- i2s
- ipc
- kmu
- lpcomp
- mutex
- nfct
- nvmc
- oscillators
- pdm
- power
- pwm
- qdec
- qspi
- regulators
- reset
- rtc
- saadc
- shared
- spim
- spis
- spu
- tad
- timer
- twim
- twis
- uarte
- uicr
- usbd
- usbreg
- vmc
- wdt
Enums§
Constants§
- CACHEDATA_
S - CACHEDATA
- CACHEINFO_
S - CACHEINFO
- CACHE_S
- Cache
- CLOCK_
NS - Clock management 0
- CLOCK_S
- Clock management 1
- COMP_NS
- Comparator 0
- COMP_S
- Comparator 1
- CRYPTOCELL_
S - ARM TrustZone CryptoCell register interface
- CTI_S
- Cross-Trigger Interface control. NOTE: this is not a separate peripheral, but describes CM33 functionality.
- CTRLAP_
NS - Control access port 0
- CTRLAP_
S - Control access port 1
- DCNF_NS
- Domain configuration management 0
- DCNF_S
- Domain configuration management 1
- DPPIC_
NS - Distributed programmable peripheral interconnect controller 0
- DPPIC_S
- Distributed programmable peripheral interconnect controller 1
- EGU0_NS
- Event generator unit 0
- EGU0_S
- Event generator unit 1
- EGU1_NS
- Event generator unit 2
- EGU1_S
- Event generator unit 3
- EGU2_NS
- Event generator unit 4
- EGU2_S
- Event generator unit 5
- EGU3_NS
- Event generator unit 6
- EGU3_S
- Event generator unit 7
- EGU4_NS
- Event generator unit 8
- EGU4_S
- Event generator unit 9
- EGU5_NS
- Event generator unit 10
- EGU5_S
- Event generator unit 11
- FICR_S
- Factory Information Configuration Registers
- FPU_NS
- FPU control peripheral 0
- FPU_S
- FPU control peripheral 1
- GPIOT
E0_ S - GPIO Tasks and Events 0
- GPIOT
E1_ NS - GPIO Tasks and Events 1
- I2S0_NS
- Inter-IC Sound 0
- I2S0_S
- Inter-IC Sound 1
- IPC_NS
- Interprocessor communication 0
- IPC_S
- Interprocessor communication 1
- KMU_NS
- Key management unit 0
- KMU_S
- Key management unit 1
- LPCOMP_
NS - Low-power comparator 0
- LPCOMP_
S - Low-power comparator 1
- MUTEX_
NS - MUTEX 0
- MUTEX_S
- MUTEX 1
- NFCT_NS
- NFC-A compatible radio 0
- NFCT_S
- NFC-A compatible radio 1
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority
- NVMC_NS
- Non-volatile memory controller 0
- NVMC_S
- Non-volatile memory controller 1
- OSCILLATORS_
NS - Oscillator control 0
- OSCILLATORS_
S - Oscillator control 1
- P0_NS
- GPIO Port 0
- P0_S
- GPIO Port 2
- P1_NS
- GPIO Port 1
- P1_S
- GPIO Port 3
- PDM0_NS
- Pulse Density Modulation (Digital Microphone) Interface 0
- PDM0_S
- Pulse Density Modulation (Digital Microphone) Interface 1
- POWER_
NS - Power control 0
- POWER_S
- Power control 1
- PWM0_NS
- Pulse width modulation unit 0
- PWM0_S
- Pulse width modulation unit 1
- PWM1_NS
- Pulse width modulation unit 2
- PWM1_S
- Pulse width modulation unit 3
- PWM2_NS
- Pulse width modulation unit 4
- PWM2_S
- Pulse width modulation unit 5
- PWM3_NS
- Pulse width modulation unit 6
- PWM3_S
- Pulse width modulation unit 7
- QDEC0_
NS - Quadrature Decoder 0
- QDEC0_S
- Quadrature Decoder 1
- QDEC1_
NS - Quadrature Decoder 2
- QDEC1_S
- Quadrature Decoder 3
- QSPI_NS
- External flash interface 0
- QSPI_S
- External flash interface 1
- REGULATORS_
NS - Voltage regulators 0
- REGULATORS_
S - Voltage regulators 1
- RESET_
NS - Reset control 0
- RESET_S
- Reset control 1
- RTC0_NS
- Real-time counter 0
- RTC0_S
- Real-time counter 1
- RTC1_NS
- Real-time counter 2
- RTC1_S
- Real-time counter 3
- SAADC_
NS - Analog to Digital Converter 0
- SAADC_S
- Analog to Digital Converter 1
- SPIM0_
NS - Serial Peripheral Interface Master with EasyDMA 0
- SPIM0_S
- Serial Peripheral Interface Master with EasyDMA 1
- SPIM1_
NS - Serial Peripheral Interface Master with EasyDMA 2
- SPIM1_S
- Serial Peripheral Interface Master with EasyDMA 3
- SPIM2_
NS - Serial Peripheral Interface Master with EasyDMA 6
- SPIM2_S
- Serial Peripheral Interface Master with EasyDMA 7
- SPIM3_
NS - Serial Peripheral Interface Master with EasyDMA 8
- SPIM3_S
- Serial Peripheral Interface Master with EasyDMA 9
- SPIM4_
NS - Serial Peripheral Interface Master with EasyDMA 4
- SPIM4_S
- Serial Peripheral Interface Master with EasyDMA 5
- SPIS0_
NS - SPI Slave 0
- SPIS0_S
- SPI Slave 1
- SPIS1_
NS - SPI Slave 2
- SPIS1_S
- SPI Slave 3
- SPIS2_
NS - SPI Slave 4
- SPIS2_S
- SPI Slave 5
- SPIS3_
NS - SPI Slave 6
- SPIS3_S
- SPI Slave 7
- SPU_S
- System protection unit
- TAD_S
- Trace and debug control
- TIME
R0_ NS - Timer/Counter 0
- TIME
R0_ S - Timer/Counter 1
- TIME
R1_ NS - Timer/Counter 2
- TIME
R1_ S - Timer/Counter 3
- TIME
R2_ NS - Timer/Counter 4
- TIME
R2_ S - Timer/Counter 5
- TWIM0_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 0
- TWIM0_S
- I2C compatible Two-Wire Master Interface with EasyDMA 1
- TWIM1_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 2
- TWIM1_S
- I2C compatible Two-Wire Master Interface with EasyDMA 3
- TWIM2_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 4
- TWIM2_S
- I2C compatible Two-Wire Master Interface with EasyDMA 5
- TWIM3_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 6
- TWIM3_S
- I2C compatible Two-Wire Master Interface with EasyDMA 7
- TWIS0_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 0
- TWIS0_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 1
- TWIS1_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 2
- TWIS1_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 3
- TWIS2_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 4
- TWIS2_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 5
- TWIS3_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 6
- TWIS3_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 7
- UART
E0_ NS - UART with EasyDMA 0
- UART
E0_ S - UART with EasyDMA 1
- UART
E1_ NS - UART with EasyDMA 2
- UART
E1_ S - UART with EasyDMA 3
- UART
E2_ NS - UART with EasyDMA 4
- UART
E2_ S - UART with EasyDMA 5
- UART
E3_ NS - UART with EasyDMA 6
- UART
E3_ S - UART with EasyDMA 7
- UICR_S
- User Information Configuration Registers User information configuration registers
- USBD_NS
- Universal serial bus device 0
- USBD_S
- Universal serial bus device 1
- USBREGULATOR_
NS - USB Regulator 0
- USBREGULATOR_
S - USB Regulator 1
- VMC_NS
- Volatile Memory controller 0
- VMC_S
- Volatile Memory controller 1
- WDT0_NS
- Watchdog Timer 0
- WDT0_S
- Watchdog Timer 1
- WDT1_NS
- Watchdog Timer 2
- WDT1_S
- Watchdog Timer 3