Expand description
Type-level interrupt infrastructure.
This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.
As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts!
macro
to bind interrupts, and the [crate::interrupt
] module to manually register interrupt handlers and manipulate
interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)
Enums§
- ADC_
IRQ_ FIFO - ADC_IRQ_FIFO typelevel interrupt.
- CLOCKS_
IRQ - CLOCKS_IRQ typelevel interrupt.
- DMA_
IRQ_ 0 - DMA_IRQ_0 typelevel interrupt.
- DMA_
IRQ_ 1 - DMA_IRQ_1 typelevel interrupt.
- I2C0_
IRQ - I2C0_IRQ typelevel interrupt.
- I2C1_
IRQ - I2C1_IRQ typelevel interrupt.
- IO_
IRQ_ BANK0 - IO_IRQ_BANK0 typelevel interrupt.
- IO_
IRQ_ QSPI - IO_IRQ_QSPI typelevel interrupt.
- PIO0_
IRQ_ 0 - PIO0_IRQ_0 typelevel interrupt.
- PIO0_
IRQ_ 1 - PIO0_IRQ_1 typelevel interrupt.
- PIO1_
IRQ_ 0 - PIO1_IRQ_0 typelevel interrupt.
- PIO1_
IRQ_ 1 - PIO1_IRQ_1 typelevel interrupt.
- PWM_
IRQ_ WRAP - PWM_IRQ_WRAP typelevel interrupt.
- RTC_IRQ
- RTC_IRQ typelevel interrupt.
- SIO_
IRQ_ PROC0 - SIO_IRQ_PROC0 typelevel interrupt.
- SIO_
IRQ_ PROC1 - SIO_IRQ_PROC1 typelevel interrupt.
- SPI0_
IRQ - SPI0_IRQ typelevel interrupt.
- SPI1_
IRQ - SPI1_IRQ typelevel interrupt.
- SWI_
IRQ_ 0 - SWI_IRQ_0 typelevel interrupt.
- SWI_
IRQ_ 1 - SWI_IRQ_1 typelevel interrupt.
- SWI_
IRQ_ 2 - SWI_IRQ_2 typelevel interrupt.
- SWI_
IRQ_ 3 - SWI_IRQ_3 typelevel interrupt.
- SWI_
IRQ_ 4 - SWI_IRQ_4 typelevel interrupt.
- SWI_
IRQ_ 5 - SWI_IRQ_5 typelevel interrupt.
- TIMER_
IRQ_ 0 - TIMER_IRQ_0 typelevel interrupt.
- TIMER_
IRQ_ 1 - TIMER_IRQ_1 typelevel interrupt.
- TIMER_
IRQ_ 2 - TIMER_IRQ_2 typelevel interrupt.
- TIMER_
IRQ_ 3 - TIMER_IRQ_3 typelevel interrupt.
- UART0_
IRQ - UART0_IRQ typelevel interrupt.
- UART1_
IRQ - UART1_IRQ typelevel interrupt.
- USBCTRL_
IRQ - USBCTRL_IRQ typelevel interrupt.
- XIP_IRQ
- XIP_IRQ typelevel interrupt.