Struct Peripherals

pub struct Peripherals {

    pub PA0: PA0,
    pub PA1: PA1,
    pub PA2: PA2,
    pub PA3: PA3,
    pub PA4: PA4,
    pub PA5: PA5,
    pub PA6: PA6,
    pub PA7: PA7,
    pub PA8: PA8,
    pub PA9: PA9,
    pub PA10: PA10,
    pub PA11: PA11,
    pub PA12: PA12,
    pub PA13: PA13,
    pub PA14: PA14,
    pub PA15: PA15,
    pub PB0: PB0,
    pub PB1: PB1,
    pub PB2: PB2,
    pub PB3: PB3,
    pub PB4: PB4,
    pub PB5: PB5,
    pub PB6: PB6,
    pub PB7: PB7,
    pub PB8: PB8,
    pub PB10: PB10,
    pub PC14: PC14,
    pub PC15: PC15,
    pub PH3: PH3,
    pub ADC1: ADC1,
    pub ADC12_COMMON: ADC12_COMMON,
    pub ADC2: ADC2,
    pub CRC: CRC,
    pub CRS: CRS,
    pub DBGMCU: DBGMCU,
    pub DMA1: DMA1,
    pub DMA2: DMA2,
    pub FLASH: FLASH,
    pub I2C1: I2C1,
    pub I2C3: I2C3,
    pub IWDG: IWDG,
    pub LPTIM1: LPTIM1,
    pub LPTIM2: LPTIM2,
    pub LPUART1: LPUART1,
    pub PWR: PWR,
    pub QUADSPI: QUADSPI,
    pub MCO: MCO,
    pub RCC: RCC,
    pub RNG: RNG,
    pub RTC: RTC,
    pub SPI1: SPI1,
    pub SYSCFG: SYSCFG,
    pub TIM1: TIM1,
    pub TIM16: TIM16,
    pub TIM2: TIM2,
    pub TIM6: TIM6,
    pub TSC: TSC,
    pub UID: UID,
    pub USART1: USART1,
    pub USART2: USART2,
    pub USB: USB,
    pub USBRAM: USBRAM,
    pub VREFINTCAL: VREFINTCAL,
    pub WWDG: WWDG,
    pub EXTI0: EXTI0,
    pub EXTI1: EXTI1,
    pub EXTI2: EXTI2,
    pub EXTI3: EXTI3,
    pub EXTI4: EXTI4,
    pub EXTI5: EXTI5,
    pub EXTI6: EXTI6,
    pub EXTI7: EXTI7,
    pub EXTI8: EXTI8,
    pub EXTI9: EXTI9,
    pub EXTI10: EXTI10,
    pub EXTI11: EXTI11,
    pub EXTI12: EXTI12,
    pub EXTI13: EXTI13,
    pub EXTI14: EXTI14,
    pub EXTI15: EXTI15,
    pub DMA1_CH1: DMA1_CH1,
    pub DMA1_CH2: DMA1_CH2,
    pub DMA1_CH3: DMA1_CH3,
    pub DMA1_CH4: DMA1_CH4,
    pub DMA1_CH5: DMA1_CH5,
    pub DMA1_CH6: DMA1_CH6,
    pub DMA1_CH7: DMA1_CH7,
    pub DMA2_CH1: DMA2_CH1,
    pub DMA2_CH2: DMA2_CH2,
    pub DMA2_CH3: DMA2_CH3,
    pub DMA2_CH4: DMA2_CH4,
    pub DMA2_CH5: DMA2_CH5,
    pub DMA2_CH6: DMA2_CH6,
    pub DMA2_CH7: DMA2_CH7,
}

Struct containing all the peripheral singletons.

To obtain the peripherals, you must initialize the HAL, by calling crate::init.

Fields

PA0: PA0

PA0 peripheral

PA1: PA1

PA1 peripheral

PA2: PA2

PA2 peripheral

PA3: PA3

PA3 peripheral

PA4: PA4

PA4 peripheral

PA5: PA5

PA5 peripheral

PA6: PA6

PA6 peripheral

PA7: PA7

PA7 peripheral

PA8: PA8

PA8 peripheral

PA9: PA9

PA9 peripheral

PA10: PA10

PA10 peripheral

PA11: PA11

PA11 peripheral

PA12: PA12

PA12 peripheral

PA13: PA13

PA13 peripheral

PA14: PA14

PA14 peripheral

PA15: PA15

PA15 peripheral

PB0: PB0

PB0 peripheral

PB1: PB1

PB1 peripheral

PB2: PB2

PB2 peripheral

PB3: PB3

PB3 peripheral

PB4: PB4

PB4 peripheral

PB5: PB5

PB5 peripheral

PB6: PB6

PB6 peripheral

PB7: PB7

PB7 peripheral

PB8: PB8

PB8 peripheral

PB10: PB10

PB10 peripheral

PC14: PC14

PC14 peripheral

PC15: PC15

PC15 peripheral

PH3: PH3

PH3 peripheral

ADC1: ADC1

ADC1 peripheral

ADC12_COMMON: ADC12_COMMON

ADC12_COMMON peripheral

ADC2: ADC2

ADC2 peripheral

CRC: CRC

CRC peripheral

CRS: CRS

CRS peripheral

DBGMCU: DBGMCU

DBGMCU peripheral

DMA1: DMA1

DMA1 peripheral

DMA2: DMA2

DMA2 peripheral

FLASH: FLASH

FLASH peripheral

I2C1: I2C1

I2C1 peripheral

I2C3: I2C3

I2C3 peripheral

IWDG: IWDG

IWDG peripheral

LPTIM1: LPTIM1

LPTIM1 peripheral

LPTIM2: LPTIM2

LPTIM2 peripheral

LPUART1: LPUART1

LPUART1 peripheral

PWR: PWR

PWR peripheral

QUADSPI: QUADSPI

QUADSPI peripheral

MCO: MCO

MCO peripheral

RCC: RCC

RCC peripheral

RNG: RNG

RNG peripheral

RTC: RTC

RTC peripheral

SPI1: SPI1

SPI1 peripheral

SYSCFG: SYSCFG

SYSCFG peripheral

TIM1: TIM1

TIM1 peripheral

TIM16: TIM16

TIM16 peripheral

TIM2: TIM2

TIM2 peripheral

TIM6: TIM6

TIM6 peripheral

TSC: TSC

TSC peripheral

UID: UID

UID peripheral

USART1: USART1

USART1 peripheral

USART2: USART2

USART2 peripheral

USB: USB

USB peripheral

USBRAM: USBRAM

USBRAM peripheral

VREFINTCAL: VREFINTCAL

VREFINTCAL peripheral

WWDG: WWDG

WWDG peripheral

EXTI0: EXTI0

EXTI0 peripheral

EXTI1: EXTI1

EXTI1 peripheral

EXTI2: EXTI2

EXTI2 peripheral

EXTI3: EXTI3

EXTI3 peripheral

EXTI4: EXTI4

EXTI4 peripheral

EXTI5: EXTI5

EXTI5 peripheral

EXTI6: EXTI6

EXTI6 peripheral

EXTI7: EXTI7

EXTI7 peripheral

EXTI8: EXTI8

EXTI8 peripheral

EXTI9: EXTI9

EXTI9 peripheral

EXTI10: EXTI10

EXTI10 peripheral

EXTI11: EXTI11

EXTI11 peripheral

EXTI12: EXTI12

EXTI12 peripheral

EXTI13: EXTI13

EXTI13 peripheral

EXTI14: EXTI14

EXTI14 peripheral

EXTI15: EXTI15

EXTI15 peripheral

DMA1_CH1: DMA1_CH1

DMA1_CH1 peripheral

DMA1_CH2: DMA1_CH2

DMA1_CH2 peripheral

DMA1_CH3: DMA1_CH3

DMA1_CH3 peripheral

DMA1_CH4: DMA1_CH4

DMA1_CH4 peripheral

DMA1_CH5: DMA1_CH5

DMA1_CH5 peripheral

DMA1_CH6: DMA1_CH6

DMA1_CH6 peripheral

DMA1_CH7: DMA1_CH7

DMA1_CH7 peripheral

DMA2_CH1: DMA2_CH1

DMA2_CH1 peripheral

DMA2_CH2: DMA2_CH2

DMA2_CH2 peripheral

DMA2_CH3: DMA2_CH3

DMA2_CH3 peripheral

DMA2_CH4: DMA2_CH4

DMA2_CH4 peripheral

DMA2_CH5: DMA2_CH5

DMA2_CH5 peripheral

DMA2_CH6: DMA2_CH6

DMA2_CH6 peripheral

DMA2_CH7: DMA2_CH7

DMA2_CH7 peripheral

Implementations

impl Peripherals

pub unsafe fn steal() -> Self

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.