pub struct Spi<'d, M: PeriMode> { /* private fields */ }Expand description
SPI driver.
Implementations§
Source§impl<'d, M: PeriMode> Spi<'d, M>
impl<'d, M: PeriMode> Spi<'d, M>
Sourcepub fn set_config(&mut self, config: &Config) -> Result<(), ()>
pub fn set_config(&mut self, config: &Config) -> Result<(), ()>
Reconfigures it with the supplied config.
Sourcepub fn get_current_config(&self) -> Config
pub fn get_current_config(&self) -> Config
Get current SPI configuration.
Sourcepub fn blocking_transfer_in_place<W: Word>(
&mut self,
words: &mut [W],
) -> Result<(), Error>
pub fn blocking_transfer_in_place<W: Word>( &mut self, words: &mut [W], ) -> Result<(), Error>
Blocking in-place bidirectional transfer.
This writes the contents of data on MOSI, and puts the received data on MISO in data, at the same time.
Sourcepub fn blocking_transfer<W: Word>(
&mut self,
read: &mut [W],
write: &[W],
) -> Result<(), Error>
pub fn blocking_transfer<W: Word>( &mut self, read: &mut [W], write: &[W], ) -> Result<(), Error>
Blocking bidirectional transfer.
This transfers both buffers at the same time, so it is NOT equivalent to write followed by read.
The transfer runs for max(read.len(), write.len()) bytes. If read is shorter extra bytes are ignored.
If write is shorter it is padded with zero bytes.
Source§impl<'d> Spi<'d, Blocking>
impl<'d> Spi<'d, Blocking>
Sourcepub fn new_blocking<T: Instance>(
peri: Peri<'d, T>,
sck: Peri<'d, impl SckPin<T>>,
mosi: Peri<'d, impl MosiPin<T>>,
miso: Peri<'d, impl MisoPin<T>>,
config: Config,
) -> Self
pub fn new_blocking<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, config: Config, ) -> Self
Create a new blocking SPI driver.
Sourcepub fn new_blocking_rxonly<T: Instance>(
peri: Peri<'d, T>,
sck: Peri<'d, impl SckPin<T>>,
miso: Peri<'d, impl MisoPin<T>>,
config: Config,
) -> Self
pub fn new_blocking_rxonly<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, miso: Peri<'d, impl MisoPin<T>>, config: Config, ) -> Self
Create a new blocking SPI driver, in RX-only mode (only MISO pin, no MOSI).
Source§impl<'d> Spi<'d, Async>
impl<'d> Spi<'d, Async>
Sourcepub fn new<T: Instance>(
peri: Peri<'d, T>,
sck: Peri<'d, impl SckPin<T>>,
mosi: Peri<'d, impl MosiPin<T>>,
miso: Peri<'d, impl MisoPin<T>>,
tx_dma: Peri<'d, impl TxDma<T>>,
rx_dma: Peri<'d, impl RxDma<T>>,
config: Config,
) -> Self
pub fn new<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, tx_dma: Peri<'d, impl TxDma<T>>, rx_dma: Peri<'d, impl RxDma<T>>, config: Config, ) -> Self
Create a new SPI driver.
Sourcepub fn new_rxonly<T: Instance>(
peri: Peri<'d, T>,
sck: Peri<'d, impl SckPin<T>>,
miso: Peri<'d, impl MisoPin<T>>,
rx_dma: Peri<'d, impl RxDma<T>>,
config: Config,
) -> Self
pub fn new_rxonly<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, miso: Peri<'d, impl MisoPin<T>>, rx_dma: Peri<'d, impl RxDma<T>>, config: Config, ) -> Self
Create a new SPI driver, in RX-only mode (only MISO pin, no MOSI).
Sourcepub fn new_txonly<T: Instance>(
peri: Peri<'d, T>,
sck: Peri<'d, impl SckPin<T>>,
mosi: Peri<'d, impl MosiPin<T>>,
tx_dma: Peri<'d, impl TxDma<T>>,
config: Config,
) -> Self
pub fn new_txonly<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, tx_dma: Peri<'d, impl TxDma<T>>, config: Config, ) -> Self
Create a new SPI driver, in TX-only mode (only MOSI pin, no MISO).
Sourcepub fn new_txonly_nosck<T: Instance>(
peri: Peri<'d, T>,
mosi: Peri<'d, impl MosiPin<T>>,
tx_dma: Peri<'d, impl TxDma<T>>,
config: Config,
) -> Self
pub fn new_txonly_nosck<T: Instance>( peri: Peri<'d, T>, mosi: Peri<'d, impl MosiPin<T>>, tx_dma: Peri<'d, impl TxDma<T>>, config: Config, ) -> Self
Create a new SPI driver, in TX-only mode, without SCK pin.
This can be useful for bit-banging non-SPI protocols.
Sourcepub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error>
pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error>
SPI read, using DMA.
Sourcepub async fn transfer<W: Word>(
&mut self,
read: &mut [W],
write: &[W],
) -> Result<(), Error>
pub async fn transfer<W: Word>( &mut self, read: &mut [W], write: &[W], ) -> Result<(), Error>
Bidirectional transfer, using DMA.
This transfers both buffers at the same time, so it is NOT equivalent to write followed by read.
The transfer runs for max(read.len(), write.len()) bytes. If read is shorter extra bytes are ignored.
If write is shorter it is padded with zero bytes.
Trait Implementations§
Source§impl<'d, W: Word> SpiBus<W> for Spi<'d, Async>
impl<'d, W: Word> SpiBus<W> for Spi<'d, Async>
Source§async fn flush(&mut self) -> Result<(), Self::Error>
async fn flush(&mut self) -> Result<(), Self::Error>
Source§async fn write(&mut self, words: &[W]) -> Result<(), Self::Error>
async fn write(&mut self, words: &[W]) -> Result<(), Self::Error>
words to the slave, ignoring all the incoming words. Read moreSource§async fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>
async fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>
words from the slave. Read moreSource§impl<'d, W: Word, M: PeriMode> SpiBus<W> for Spi<'d, M>
impl<'d, W: Word, M: PeriMode> SpiBus<W> for Spi<'d, M>
Source§fn flush(&mut self) -> Result<(), Self::Error>
fn flush(&mut self) -> Result<(), Self::Error>
Source§fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>
fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>
words from the slave. Read moreSource§fn write(&mut self, words: &[W]) -> Result<(), Self::Error>
fn write(&mut self, words: &[W]) -> Result<(), Self::Error>
words to the slave, ignoring all the incoming words. Read more