pub struct Peripherals {Show 100 fields
pub PA0: Peri<'static, PA0>,
pub PA1: Peri<'static, PA1>,
pub PA2: Peri<'static, PA2>,
pub PA3: Peri<'static, PA3>,
pub PA4: Peri<'static, PA4>,
pub PA5: Peri<'static, PA5>,
pub PA6: Peri<'static, PA6>,
pub PA7: Peri<'static, PA7>,
pub PA8: Peri<'static, PA8>,
pub PA9: Peri<'static, PA9>,
pub PA10: Peri<'static, PA10>,
pub PA11: Peri<'static, PA11>,
pub PA12: Peri<'static, PA12>,
pub PA13: Peri<'static, PA13>,
pub PA14: Peri<'static, PA14>,
pub PA15: Peri<'static, PA15>,
pub PB0: Peri<'static, PB0>,
pub PB2: Peri<'static, PB2>,
pub PB3: Peri<'static, PB3>,
pub PB4: Peri<'static, PB4>,
pub PB5: Peri<'static, PB5>,
pub PB6: Peri<'static, PB6>,
pub PB7: Peri<'static, PB7>,
pub PB8: Peri<'static, PB8>,
pub PB12: Peri<'static, PB12>,
pub PC13: Peri<'static, PC13>,
pub PC14: Peri<'static, PC14>,
pub PC15: Peri<'static, PC15>,
pub PH3: Peri<'static, PH3>,
pub ADC1: Peri<'static, ADC1>,
pub ADC1_COMMON: Peri<'static, ADC1_COMMON>,
pub AES: Peri<'static, AES>,
pub COMP1: Peri<'static, COMP1>,
pub COMP2: Peri<'static, COMP2>,
pub CRC: Peri<'static, CRC>,
pub DAC1: Peri<'static, DAC1>,
pub DBGMCU: Peri<'static, DBGMCU>,
pub DMA1: Peri<'static, DMA1>,
pub DMA2: Peri<'static, DMA2>,
pub DMAMUX1: Peri<'static, DMAMUX1>,
pub FLASH: Peri<'static, FLASH>,
pub HSEM: Peri<'static, HSEM>,
pub I2C1: Peri<'static, I2C1>,
pub I2C2: Peri<'static, I2C2>,
pub I2C3: Peri<'static, I2C3>,
pub IPCC: Peri<'static, IPCC>,
pub IWDG: Peri<'static, IWDG>,
pub LPTIM1: Peri<'static, LPTIM1>,
pub LPTIM2: Peri<'static, LPTIM2>,
pub LPTIM3: Peri<'static, LPTIM3>,
pub LPUART1: Peri<'static, LPUART1>,
pub PKA: Peri<'static, PKA>,
pub PWR: Peri<'static, PWR>,
pub MCO: Peri<'static, MCO>,
pub RCC: Peri<'static, RCC>,
pub RNG: Peri<'static, RNG>,
pub RTC: Peri<'static, RTC>,
pub SPI1: Peri<'static, SPI1>,
pub SPI2: Peri<'static, SPI2>,
pub SUBGHZSPI: Peri<'static, SUBGHZSPI>,
pub SYSCFG: Peri<'static, SYSCFG>,
pub TAMP: Peri<'static, TAMP>,
pub TIM1: Peri<'static, TIM1>,
pub TIM16: Peri<'static, TIM16>,
pub TIM17: Peri<'static, TIM17>,
pub UID: Peri<'static, UID>,
pub USART1: Peri<'static, USART1>,
pub USART2: Peri<'static, USART2>,
pub VREFBUF: Peri<'static, VREFBUF>,
pub WWDG: Peri<'static, WWDG>,
pub EXTI0: Peri<'static, EXTI0>,
pub EXTI1: Peri<'static, EXTI1>,
pub EXTI2: Peri<'static, EXTI2>,
pub EXTI3: Peri<'static, EXTI3>,
pub EXTI4: Peri<'static, EXTI4>,
pub EXTI5: Peri<'static, EXTI5>,
pub EXTI6: Peri<'static, EXTI6>,
pub EXTI7: Peri<'static, EXTI7>,
pub EXTI8: Peri<'static, EXTI8>,
pub EXTI9: Peri<'static, EXTI9>,
pub EXTI10: Peri<'static, EXTI10>,
pub EXTI11: Peri<'static, EXTI11>,
pub EXTI12: Peri<'static, EXTI12>,
pub EXTI13: Peri<'static, EXTI13>,
pub EXTI14: Peri<'static, EXTI14>,
pub EXTI15: Peri<'static, EXTI15>,
pub DMA1_CH1: Peri<'static, DMA1_CH1>,
pub DMA1_CH2: Peri<'static, DMA1_CH2>,
pub DMA1_CH3: Peri<'static, DMA1_CH3>,
pub DMA1_CH4: Peri<'static, DMA1_CH4>,
pub DMA1_CH5: Peri<'static, DMA1_CH5>,
pub DMA1_CH6: Peri<'static, DMA1_CH6>,
pub DMA1_CH7: Peri<'static, DMA1_CH7>,
pub DMA2_CH1: Peri<'static, DMA2_CH1>,
pub DMA2_CH2: Peri<'static, DMA2_CH2>,
pub DMA2_CH3: Peri<'static, DMA2_CH3>,
pub DMA2_CH4: Peri<'static, DMA2_CH4>,
pub DMA2_CH5: Peri<'static, DMA2_CH5>,
pub DMA2_CH6: Peri<'static, DMA2_CH6>,
pub DMA2_CH7: Peri<'static, DMA2_CH7>,
}Expand description
Struct containing all the peripheral singletons.
To obtain the peripherals, you must initialize the HAL, by calling [crate::init].
Fields§
§PA0: Peri<'static, PA0>PA0 peripheral
PA1: Peri<'static, PA1>PA1 peripheral
PA2: Peri<'static, PA2>PA2 peripheral
PA3: Peri<'static, PA3>PA3 peripheral
PA4: Peri<'static, PA4>PA4 peripheral
PA5: Peri<'static, PA5>PA5 peripheral
PA6: Peri<'static, PA6>PA6 peripheral
PA7: Peri<'static, PA7>PA7 peripheral
PA8: Peri<'static, PA8>PA8 peripheral
PA9: Peri<'static, PA9>PA9 peripheral
PA10: Peri<'static, PA10>PA10 peripheral
PA11: Peri<'static, PA11>PA11 peripheral
PA12: Peri<'static, PA12>PA12 peripheral
PA13: Peri<'static, PA13>PA13 peripheral
PA14: Peri<'static, PA14>PA14 peripheral
PA15: Peri<'static, PA15>PA15 peripheral
PB0: Peri<'static, PB0>PB0 peripheral
PB2: Peri<'static, PB2>PB2 peripheral
PB3: Peri<'static, PB3>PB3 peripheral
PB4: Peri<'static, PB4>PB4 peripheral
PB5: Peri<'static, PB5>PB5 peripheral
PB6: Peri<'static, PB6>PB6 peripheral
PB7: Peri<'static, PB7>PB7 peripheral
PB8: Peri<'static, PB8>PB8 peripheral
PB12: Peri<'static, PB12>PB12 peripheral
PC13: Peri<'static, PC13>PC13 peripheral
PC14: Peri<'static, PC14>PC14 peripheral
PC15: Peri<'static, PC15>PC15 peripheral
PH3: Peri<'static, PH3>PH3 peripheral
ADC1: Peri<'static, ADC1>ADC1 peripheral
ADC1_COMMON: Peri<'static, ADC1_COMMON>ADC1_COMMON peripheral
AES: Peri<'static, AES>AES peripheral
COMP1: Peri<'static, COMP1>COMP1 peripheral
COMP2: Peri<'static, COMP2>COMP2 peripheral
CRC: Peri<'static, CRC>CRC peripheral
DAC1: Peri<'static, DAC1>DAC1 peripheral
DBGMCU: Peri<'static, DBGMCU>DBGMCU peripheral
DMA1: Peri<'static, DMA1>DMA1 peripheral
DMA2: Peri<'static, DMA2>DMA2 peripheral
DMAMUX1: Peri<'static, DMAMUX1>DMAMUX1 peripheral
FLASH: Peri<'static, FLASH>FLASH peripheral
HSEM: Peri<'static, HSEM>HSEM peripheral
I2C1: Peri<'static, I2C1>I2C1 peripheral
I2C2: Peri<'static, I2C2>I2C2 peripheral
I2C3: Peri<'static, I2C3>I2C3 peripheral
IPCC: Peri<'static, IPCC>IPCC peripheral
IWDG: Peri<'static, IWDG>IWDG peripheral
LPTIM1: Peri<'static, LPTIM1>LPTIM1 peripheral
LPTIM2: Peri<'static, LPTIM2>LPTIM2 peripheral
LPTIM3: Peri<'static, LPTIM3>LPTIM3 peripheral
LPUART1: Peri<'static, LPUART1>LPUART1 peripheral
PKA: Peri<'static, PKA>PKA peripheral
PWR: Peri<'static, PWR>PWR peripheral
MCO: Peri<'static, MCO>MCO peripheral
RCC: Peri<'static, RCC>RCC peripheral
RNG: Peri<'static, RNG>RNG peripheral
RTC: Peri<'static, RTC>RTC peripheral
SPI1: Peri<'static, SPI1>SPI1 peripheral
SPI2: Peri<'static, SPI2>SPI2 peripheral
SUBGHZSPI: Peri<'static, SUBGHZSPI>SUBGHZSPI peripheral
SYSCFG: Peri<'static, SYSCFG>SYSCFG peripheral
TAMP: Peri<'static, TAMP>TAMP peripheral
TIM1: Peri<'static, TIM1>TIM1 peripheral
TIM16: Peri<'static, TIM16>TIM16 peripheral
TIM17: Peri<'static, TIM17>TIM17 peripheral
UID: Peri<'static, UID>UID peripheral
USART1: Peri<'static, USART1>USART1 peripheral
USART2: Peri<'static, USART2>USART2 peripheral
VREFBUF: Peri<'static, VREFBUF>VREFBUF peripheral
WWDG: Peri<'static, WWDG>WWDG peripheral
EXTI0: Peri<'static, EXTI0>EXTI0 peripheral
EXTI1: Peri<'static, EXTI1>EXTI1 peripheral
EXTI2: Peri<'static, EXTI2>EXTI2 peripheral
EXTI3: Peri<'static, EXTI3>EXTI3 peripheral
EXTI4: Peri<'static, EXTI4>EXTI4 peripheral
EXTI5: Peri<'static, EXTI5>EXTI5 peripheral
EXTI6: Peri<'static, EXTI6>EXTI6 peripheral
EXTI7: Peri<'static, EXTI7>EXTI7 peripheral
EXTI8: Peri<'static, EXTI8>EXTI8 peripheral
EXTI9: Peri<'static, EXTI9>EXTI9 peripheral
EXTI10: Peri<'static, EXTI10>EXTI10 peripheral
EXTI11: Peri<'static, EXTI11>EXTI11 peripheral
EXTI12: Peri<'static, EXTI12>EXTI12 peripheral
EXTI13: Peri<'static, EXTI13>EXTI13 peripheral
EXTI14: Peri<'static, EXTI14>EXTI14 peripheral
EXTI15: Peri<'static, EXTI15>EXTI15 peripheral
DMA1_CH1: Peri<'static, DMA1_CH1>DMA1_CH1 peripheral
DMA1_CH2: Peri<'static, DMA1_CH2>DMA1_CH2 peripheral
DMA1_CH3: Peri<'static, DMA1_CH3>DMA1_CH3 peripheral
DMA1_CH4: Peri<'static, DMA1_CH4>DMA1_CH4 peripheral
DMA1_CH5: Peri<'static, DMA1_CH5>DMA1_CH5 peripheral
DMA1_CH6: Peri<'static, DMA1_CH6>DMA1_CH6 peripheral
DMA1_CH7: Peri<'static, DMA1_CH7>DMA1_CH7 peripheral
DMA2_CH1: Peri<'static, DMA2_CH1>DMA2_CH1 peripheral
DMA2_CH2: Peri<'static, DMA2_CH2>DMA2_CH2 peripheral
DMA2_CH3: Peri<'static, DMA2_CH3>DMA2_CH3 peripheral
DMA2_CH4: Peri<'static, DMA2_CH4>DMA2_CH4 peripheral
DMA2_CH5: Peri<'static, DMA2_CH5>DMA2_CH5 peripheral
DMA2_CH6: Peri<'static, DMA2_CH6>DMA2_CH6 peripheral
DMA2_CH7: Peri<'static, DMA2_CH7>DMA2_CH7 peripheral