Expand description
§nrf-pac
This is a Peripheral Access Crate for Nordic Semiconductor nRF microcontrollers.
This crate has been automatically generated from the SVD files in nrfx, using chiptool. Fixes are added to the SVD file to make the crate more amenable to writing HALs with, such as converting sets of identical registers/fields to arrays, merging identical registers and enums, etc.
This crate is used for the embassy-nrf Rust Hardware Abstraction Layer (HAL) for the nRF microcontrollers.
§Supported chips
- nRF51xx
- nRF52805
- nRF52810
- nRF52811
- nRF52820
- nRF52832
- nRF52833
- nRF52840
- nRF5340 appplication core
- nRF5340 network core
- nRF54L15 appplication core
- nRF9120 (SoC used in nRF9131, nRF9161 and nRF9151)
- nRF9160
§License
The contents of this crate are auto-generated and licensed under the same terms as the underlying SVD file, which is licensed by Nordic Semiconductor under a BSD-3-Clause license.
Modules§
- approtect
- cc_
host_ rgf - clock
- common
- cryptocell
- ctrlapperi
- dppic
- egu
- ficr
- fpu
- gpio
- gpiote
- i2s
- ipc
- kmu
- nvmc
- pdm
- power
- pwm
- regulators
- rtc
- saadc
- shared
- spim
- spis
- spu
- tad
- timer
- twim
- twis
- uarte
- uicr
- vmc
- wdt
Enums§
Constants§
- APPROTECT_
NS - Access Port Protection 0
- APPROTECT_
S - Access Port Protection 1
- CC_
HOST_ RGF_ S - CRYPTOCELL HOST_RGF interface
- CLOCK_
NS - Clock management 0
- CLOCK_S
- Clock management 1
- CRYPTOCELL_
S - ARM TrustZone CryptoCell register interface
- CTRL_
AP_ PERI_ S - Control access port
- DPPIC_
NS - Distributed programmable peripheral interconnect controller 0
- DPPIC_S
- Distributed programmable peripheral interconnect controller 1
- EGU0_NS
- Event generator unit 0
- EGU0_S
- Event generator unit 1
- EGU1_NS
- Event generator unit 2
- EGU1_S
- Event generator unit 3
- EGU2_NS
- Event generator unit 4
- EGU2_S
- Event generator unit 5
- EGU3_NS
- Event generator unit 6
- EGU3_S
- Event generator unit 7
- EGU4_NS
- Event generator unit 8
- EGU4_S
- Event generator unit 9
- EGU5_NS
- Event generator unit 10
- EGU5_S
- Event generator unit 11
- FICR_S
- Factory Information Configuration Registers
- FPU_NS
- FPU
- GPIOT
E0_ S - GPIO Tasks and Events 0
- GPIOT
E1_ NS - GPIO Tasks and Events 1
- I2S_NS
- Inter-IC Sound 0
- I2S_S
- Inter-IC Sound 1
- IPC_NS
- Interprocessor communication 0
- IPC_S
- Interprocessor communication 1
- KMU_NS
- Key management unit 0
- KMU_S
- Key management unit 1
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority
- NVMC_NS
- Non-volatile memory controller 0
- NVMC_S
- Non-volatile memory controller 1
- P0_NS
- GPIO Port 0
- P0_S
- GPIO Port 1
- PDM_NS
- Pulse Density Modulation (Digital Microphone) Interface 0
- PDM_S
- Pulse Density Modulation (Digital Microphone) Interface 1
- POWER_
NS - Power control 0
- POWER_S
- Power control 1
- PWM0_NS
- Pulse width modulation unit 0
- PWM0_S
- Pulse width modulation unit 1
- PWM1_NS
- Pulse width modulation unit 2
- PWM1_S
- Pulse width modulation unit 3
- PWM2_NS
- Pulse width modulation unit 4
- PWM2_S
- Pulse width modulation unit 5
- PWM3_NS
- Pulse width modulation unit 6
- PWM3_S
- Pulse width modulation unit 7
- REGULATORS_
NS - Voltage regulators control 0
- REGULATORS_
S - Voltage regulators control 1
- RTC0_NS
- Real-time counter 0
- RTC0_S
- Real-time counter 1
- RTC1_NS
- Real-time counter 2
- RTC1_S
- Real-time counter 3
- SAADC_
NS - Analog to Digital Converter 0
- SAADC_S
- Analog to Digital Converter 1
- SPIM0_
NS - Serial Peripheral Interface Master with EasyDMA 0
- SPIM0_S
- Serial Peripheral Interface Master with EasyDMA 1
- SPIM1_
NS - Serial Peripheral Interface Master with EasyDMA 2
- SPIM1_S
- Serial Peripheral Interface Master with EasyDMA 3
- SPIM2_
NS - Serial Peripheral Interface Master with EasyDMA 4
- SPIM2_S
- Serial Peripheral Interface Master with EasyDMA 5
- SPIM3_
NS - Serial Peripheral Interface Master with EasyDMA 6
- SPIM3_S
- Serial Peripheral Interface Master with EasyDMA 7
- SPIS0_
NS - SPI Slave 0
- SPIS0_S
- SPI Slave 1
- SPIS1_
NS - SPI Slave 2
- SPIS1_S
- SPI Slave 3
- SPIS2_
NS - SPI Slave 4
- SPIS2_S
- SPI Slave 5
- SPIS3_
NS - SPI Slave 6
- SPIS3_S
- SPI Slave 7
- SPU_S
- System protection unit
- TAD_S
- Trace and debug control
- TIME
R0_ NS - Timer/Counter 0
- TIME
R0_ S - Timer/Counter 1
- TIME
R1_ NS - Timer/Counter 2
- TIME
R1_ S - Timer/Counter 3
- TIME
R2_ NS - Timer/Counter 4
- TIME
R2_ S - Timer/Counter 5
- TWIM0_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 0
- TWIM0_S
- I2C compatible Two-Wire Master Interface with EasyDMA 1
- TWIM1_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 2
- TWIM1_S
- I2C compatible Two-Wire Master Interface with EasyDMA 3
- TWIM2_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 4
- TWIM2_S
- I2C compatible Two-Wire Master Interface with EasyDMA 5
- TWIM3_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 6
- TWIM3_S
- I2C compatible Two-Wire Master Interface with EasyDMA 7
- TWIS0_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 0
- TWIS0_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 1
- TWIS1_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 2
- TWIS1_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 3
- TWIS2_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 4
- TWIS2_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 5
- TWIS3_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 6
- TWIS3_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 7
- UART
E0_ NS - UART with EasyDMA 0
- UART
E0_ S - UART with EasyDMA 1
- UART
E1_ NS - UART with EasyDMA 2
- UART
E1_ S - UART with EasyDMA 3
- UART
E2_ NS - UART with EasyDMA 4
- UART
E2_ S - UART with EasyDMA 5
- UART
E3_ NS - UART with EasyDMA 6
- UART
E3_ S - UART with EasyDMA 7
- UICR_S
- User information configuration registers User information configuration registers
- VMC_NS
- Volatile Memory controller 0
- VMC_S
- Volatile Memory controller 1
- WDT_NS
- Watchdog Timer 0
- WDT_S
- Watchdog Timer 1