nrf-pac

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Crate nrf_pac

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§nrf-pac

This is a Peripheral Access Crate for Nordic Semiconductor nRF microcontrollers.

This crate has been automatically generated from the SVD files in nrfx, using chiptool. Fixes are added to the SVD file to make the crate more amenable to writing HALs with, such as converting sets of identical registers/fields to arrays, merging identical registers and enums, etc.

This crate is used for the embassy-nrf Rust Hardware Abstraction Layer (HAL) for the nRF microcontrollers.

§Supported chips

  • nRF51xx
  • nRF52805
  • nRF52810
  • nRF52811
  • nRF52820
  • nRF52832
  • nRF52833
  • nRF52840
  • nRF5340 appplication core
  • nRF5340 network core
  • nRF54L15 appplication core
  • nRF9120 (SoC used in nRF9131, nRF9161 and nRF9151)
  • nRF9160

§License

The contents of this crate are auto-generated and licensed under the same terms as the underlying SVD file, which is licensed by Nordic Semiconductor under a BSD-3-Clause license.

Modules§

Enums§

Constants§

  • Accelerated Address Resolver
  • Access control lists
  • Access Port Protection
  • AES CCM mode encryption
  • Clock control
  • Comparator
  • AES ECB Mode Encryption
  • Event generator unit 0
  • Event generator unit 1
  • Event generator unit 2
  • Event generator unit 3
  • Event generator unit 4
  • Event generator unit 5
  • Factory information configuration registers
  • FPU
  • GPIO Tasks and Events
  • Inter-IC Sound
  • Low-power comparator
  • Memory Watch Unit
  • NFC-A compatible radio
  • Number available in the NVIC for configuring priority
  • Non Volatile Memory Controller
  • GPIO Port 1
  • GPIO Port 2
  • Pulse Density Modulation (Digital Microphone) Interface
  • Power control
  • Programmable Peripheral Interconnect
  • Pulse width modulation unit 0
  • Pulse width modulation unit 1
  • Pulse width modulation unit 2
  • Pulse width modulation unit 3
  • Quadrature Decoder
  • 2.4 GHz radio
  • Random Number Generator
  • Real time counter 0
  • Real time counter 1
  • Real time counter 2
  • Successive approximation register (SAR) analog-to-digital converter
  • Serial Peripheral Interface 0
  • Serial Peripheral Interface 1
  • Serial Peripheral Interface 2
  • Serial Peripheral Interface Master with EasyDMA 0
  • Serial Peripheral Interface Master with EasyDMA 1
  • Serial Peripheral Interface Master with EasyDMA 2
  • Serial Peripheral Interface Master with EasyDMA 3
  • SPI Slave 0
  • SPI Slave 1
  • SPI Slave 2
  • Software interrupt 0
  • Software interrupt 1
  • Software interrupt 2
  • Software interrupt 3
  • Software interrupt 4
  • Software interrupt 5
  • Temperature Sensor
  • Timer/Counter 0
  • Timer/Counter 1
  • Timer/Counter 2
  • Timer/Counter 3
  • Timer/Counter 4
  • I2C compatible Two-Wire Interface 0
  • I2C compatible Two-Wire Interface 1
  • I2C compatible Two-Wire Master Interface with EasyDMA 0
  • I2C compatible Two-Wire Master Interface with EasyDMA 1
  • I2C compatible Two-Wire Slave Interface with EasyDMA 0
  • I2C compatible Two-Wire Slave Interface with EasyDMA 1
  • Universal Asynchronous Receiver/Transmitter
  • UART with EasyDMA 0
  • UART with EasyDMA 1
  • User information configuration registers
  • Universal serial bus device
  • Watchdog Timer

Attribute Macros§