Structsยง
- Status register for DOUT DMA engine activity when accessing memory.
- Status register for DOUT DMA engine activity when accessing RNG SRAM.
- Configure the endianness of DOUT DMA transactions towards RNG SRAM.
- Register indicating if DOUT FIFO is empty or if more data will come.
- Indication that the next CPU read from the DOUT_BUFFER is the last in the sequence. This is needed only when the data size is NOT modulo 4 (e.g. HASH padding).
- Reset the DOUT DMA engine.
- The number of bytes to be written to memory.