Description collection: Register for mapping the virtual register R[n] to a physical address in the PKA SRAM.
This register defines the N, Np, T0, and T1 virtual register index.
Operation code to be executed by the PKA engine. Writing to this register triggers the PKA operation.
Status register indicating if the PKA operation has been completed.
Description collection: This register holds the operands bit size.
Status register indicating if the PKA pipeline is ready to receive a new OPCODE.
This register holds the status for the PKA pipeline.
Reset the PKA engine.