Module regs

Structs

• Align
  Alignment of sample within a frame
• Channels
  Enable channels
• Enable
  Enable I2S module
• Format
  Frame format
• Int
  Enable or disable interrupt
• Maxcnt
  Size of RXD and TXD buffers
• Mcken
  Master clock generator enable
• Mckfreq
  I2S clock generator control
• Mode
  I2S mode
• Ratio
  MCK / LRCK ratio
• Rxen
  Reception (RX) enable
• Swidth
  Sample width
• Terminateonbuserror
  Description cluster: Terminate the transaction if a BUSERROR event is detected.
• Txen
  Transmission (TX) enable