pub struct Interp(pub *mut u8);
Tuple Fields§
§0: *mut u8
Implementations§
Source§impl Interp
impl Interp
Sourcepub fn pop_lane0(self) -> Reg<u32, R>
pub fn pop_lane0(self) -> Reg<u32, R>
Read LANE0 result, and simultaneously write lane results to both accumulators (POP).
Sourcepub fn pop_lane1(self) -> Reg<u32, R>
pub fn pop_lane1(self) -> Reg<u32, R>
Read LANE1 result, and simultaneously write lane results to both accumulators (POP).
Sourcepub fn pop_full(self) -> Reg<u32, R>
pub fn pop_full(self) -> Reg<u32, R>
Read FULL result, and simultaneously write lane results to both accumulators (POP).
Sourcepub fn peek_lane0(self) -> Reg<u32, R>
pub fn peek_lane0(self) -> Reg<u32, R>
Read LANE0 result, without altering any internal state (PEEK).
Sourcepub fn peek_lane1(self) -> Reg<u32, R>
pub fn peek_lane1(self) -> Reg<u32, R>
Read LANE1 result, without altering any internal state (PEEK).
Sourcepub fn peek_full(self) -> Reg<u32, R>
pub fn peek_full(self) -> Reg<u32, R>
Read FULL result, without altering any internal state (PEEK).
Sourcepub fn ctrl_lane0(self) -> Reg<Interp0ctrlLane0, RW>
pub fn ctrl_lane0(self) -> Reg<Interp0ctrlLane0, RW>
Control register for lane 0
Sourcepub fn ctrl_lane1(self) -> Reg<Interp0ctrlLane1, RW>
pub fn ctrl_lane1(self) -> Reg<Interp0ctrlLane1, RW>
Control register for lane 1
Sourcepub fn accum0_add(self) -> Reg<Interp0accum0add, RW>
pub fn accum0_add(self) -> Reg<Interp0accum0add, RW>
Values written here are atomically added to ACCUM0 Reading yields lane 0’s raw shift and mask value (BASE0 not added).
Sourcepub fn accum1_add(self) -> Reg<Interp0accum1add, RW>
pub fn accum1_add(self) -> Reg<Interp0accum1add, RW>
Values written here are atomically added to ACCUM1 Reading yields lane 1’s raw shift and mask value (BASE1 not added).
Sourcepub fn base_1and0(self) -> Reg<u32, W>
pub fn base_1and0(self) -> Reg<u32, W>
On write, the lower 16 bits go to BASE0, upper bits to BASE1 simultaneously. Each half is sign-extended to 32 bits if that lane’s SIGNED flag is set.