Enum Lec
#[repr(u8)]pub enum Lec {
NO_ERROR = 0,
STUFF = 1,
FORM = 2,
ACK = 3,
BIT_1 = 4,
BIT_0 = 5,
CRC = 6,
NO_CHANGE = 7,
}
Variants§
NO_ERROR = 0
No Error: No error occurred since LEC has been reset by successful reception or transmission.
STUFF = 1
Stuff Error: More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed.
FORM = 2
Form Error: A fixed format part of a received frame has the wrong format.
ACK = 3
AckError: The message transmitted by the FDCAN was not acknowledged by another node.
BIT_1 = 4
Bit1Error: During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant.
BIT_0 = 5
Bit0Error: During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored bus value was recessive. During Bus_Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus_Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed).
CRC = 6
CRCError: The CRC check sum of a received message was incorrect. The CRC of an incoming message does not match with the CRC calculated from the received data.
NO_CHANGE = 7
NoChange: Any read access to the Protocol status register re-initializes the LEC to ‘7’. When the LEC shows the value ‘7’, no CAN bus event was detected since the last CPU read access to the Protocol status register.