Struct Ccipr1
#[repr(transparent)]pub struct Ccipr1(pub u32);
Expand description
RCC kernel clock configuration register
Tuple Fields§
§0: u32
Implementations§
§impl Ccipr1
impl Ccipr1
pub const fn usart1sel(&self) -> Usartsel
pub const fn usart1sel(&self) -> Usartsel
USART1 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub fn set_usart1sel(&mut self, val: Usartsel)
pub fn set_usart1sel(&mut self, val: Usartsel)
USART1 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub const fn usart2sel(&self) -> Usartsel
pub const fn usart2sel(&self) -> Usartsel
USART2 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub fn set_usart2sel(&mut self, val: Usartsel)
pub fn set_usart2sel(&mut self, val: Usartsel)
USART2 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub const fn usart3sel(&self) -> Usartsel
pub const fn usart3sel(&self) -> Usartsel
USART3 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub fn set_usart3sel(&mut self, val: Usartsel)
pub fn set_usart3sel(&mut self, val: Usartsel)
USART3 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled
pub const fn uart4sel(&self) -> Uartsel
pub const fn uart4sel(&self) -> Uartsel
UART4 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_uart4sel(&mut self, val: Uartsel)
pub fn set_uart4sel(&mut self, val: Uartsel)
UART4 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn uart5sel(&self) -> Uartsel
pub const fn uart5sel(&self) -> Uartsel
UART5 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_uart5sel(&mut self, val: Uartsel)
pub fn set_uart5sel(&mut self, val: Uartsel)
UART5 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn usart6sel(&self) -> Usartsel
pub const fn usart6sel(&self) -> Usartsel
USART6 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_usart6sel(&mut self, val: Usartsel)
pub fn set_usart6sel(&mut self, val: Usartsel)
USART6 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn uart7sel(&self) -> Uartsel
pub const fn uart7sel(&self) -> Uartsel
UART7 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_uart7sel(&mut self, val: Uartsel)
pub fn set_uart7sel(&mut self, val: Uartsel)
UART7 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn uart8sel(&self) -> Uartsel
pub const fn uart8sel(&self) -> Uartsel
UART8 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_uart8sel(&mut self, val: Uartsel)
pub fn set_uart8sel(&mut self, val: Uartsel)
UART8 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn uart9sel(&self) -> Uartsel
pub const fn uart9sel(&self) -> Uartsel
UART9 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_uart9sel(&mut self, val: Uartsel)
pub fn set_uart9sel(&mut self, val: Uartsel)
UART9 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn usart10sel(&self) -> Usartsel
pub const fn usart10sel(&self) -> Usartsel
USART10 kernel clock source selection others: reserved, the kernel clock is disabled
pub fn set_usart10sel(&mut self, val: Usartsel)
pub fn set_usart10sel(&mut self, val: Usartsel)
USART10 kernel clock source selection others: reserved, the kernel clock is disabled
pub const fn timicsel(&self) -> Timicsel
pub const fn timicsel(&self) -> Timicsel
TIM12, TIM15 and LPTIM2 input capture source selection Set and reset by software.
pub fn set_timicsel(&mut self, val: Timicsel)
pub fn set_timicsel(&mut self, val: Timicsel)
TIM12, TIM15 and LPTIM2 input capture source selection Set and reset by software.