Enum Ocm

#[repr(u8)]
pub enum Ocm {
    FROZEN = 0,
    ACTIVE_ON_MATCH = 1,
    INACTIVE_ON_MATCH = 2,
    TOGGLE = 3,
    FORCE_INACTIVE = 4,
    FORCE_ACTIVE = 5,
    PWM_MODE1 = 6,
    PWM_MODE2 = 7,
    RETRIGERRABLE_OPM_MODE_1 = 8,
    RETRIGERRABLE_OPM_MODE_2 = 9,
    _RESERVED1 = 10,
    _RESERVED2 = 11,
    COMBINED_PWM_MODE_1 = 12,
    COMBINED_PWM_MODE_2 = 13,
    ASYMMETRIC_PWM_MODE_1 = 14,
    ASYMMETRIC_PWM_MODE_2 = 15,
}

Variants

FROZEN = 0

The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs

ACTIVE_ON_MATCH = 1

Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register

INACTIVE_ON_MATCH = 2

Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register

TOGGLE = 3

OCyREF toggles when TIMx_CNT=TIMx_CCRy

FORCE_INACTIVE = 4

OCyREF is forced low

FORCE_ACTIVE = 5

OCyREF is forced high

PWM_MODE1 = 6

In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active

PWM_MODE2 = 7

Inversely to PwmMode1

RETRIGERRABLE_OPM_MODE_1 = 8

In up-counting mode, the channel is active until a trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM mode 1 and the channels becomes active again at the next update. In down-counting mode, the channel is inactive until a trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM mode 1 and the channels becomes inactive again at the next update.

RETRIGERRABLE_OPM_MODE_2 = 9

In up-counting mode, the channel is inactive until a trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM mode 2 and the channels becomes inactive again at the next update. In down- counting mode, the channel is active until a trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM mode 1 and the channels becomes active again at the next update.

_RESERVED1 = 10

_reserved1

_RESERVED2 = 11

_reserved2

COMBINED_PWM_MODE_1 = 12

tim_oc1ref has the same behavior as in PWM mode 1. tim_oc1refc is the logical OR between tim_oc1ref and tim_oc2ref.

COMBINED_PWM_MODE_2 = 13

tim_oc1ref has the same behavior as in PWM mode 2. tim_oc1refc is the logical AND between tim_oc1ref and tim_oc2ref.

ASYMMETRIC_PWM_MODE_1 = 14

tim_oc1ref has the same behavior as in PWM mode 1. tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is counting down.

ASYMMETRIC_PWM_MODE_2 = 15

tim_oc1ref has the same behavior as in PWM mode 2. tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is counting down.

Implementations

impl Ocm

pub const fn from_bits(val: u8) -> Ocm

pub const fn to_bits(self) -> u8

Trait Implementations

impl Clone for Ocm

fn clone(&self) -> Ocm

Returns a duplicate of the value.

const fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Ocm

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<Ocm> for u8

fn from(val: Ocm) -> u8

Converts to this type from the input type.

impl From<u8> for Ocm

fn from(val: u8) -> Ocm

Converts to this type from the input type.

impl Ord for Ocm

fn cmp(&self, other: &Ocm) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized,

Restrict a value to a certain interval.

impl PartialEq for Ocm

fn eq(&self, other: &Ocm) -> bool

Tests for self and other values to be equal, and is used by ==.

const fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for Ocm

fn partial_cmp(&self, other: &Ocm) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for Ocm

impl Eq for Ocm

impl StructuralPartialEq for Ocm