Struct Dcr1

#[repr(transparent)]
pub struct Dcr1(pub u32);

XSPI device configuration register 1

Tuple Fields

0: u32

Implementations

impl Dcr1

pub const fn ckmode(&self) -> Ckmode

clock mode 0/mode 3 This bit indicates the level taken by the CLK between commands (when NCS = 1).

pub fn set_ckmode(&mut self, val: Ckmode)

clock mode 0/mode 3 This bit indicates the level taken by the CLK between commands (when NCS = 1).

pub const fn frck(&self) -> bool

Free running clock This bit configures the free running clock.

pub fn set_frck(&mut self, val: bool)

Free running clock This bit configures the free running clock.

pub const fn csht(&self) -> Csht

Chip-select high time CSHT + 1 defines the minimum number of CLK cycles where the chip-select (NCS) must remain high between commands issued to the external device. …

pub fn set_csht(&mut self, val: Csht)

Chip-select high time CSHT + 1 defines the minimum number of CLK cycles where the chip-select (NCS) must remain high between commands issued to the external device. …

pub const fn devsize(&self) -> u8

Device size This field defines the size of the external device using the following formula: Number of bytes in device = 2^[DEVSIZE+1]. DEVSIZE+1 is effectively the number of address bits required to address the external device. The device capacity can be up to 4 Gbytes (addressed using 32-bits) in indirect mode, but the addressable space in memory-mapped mode is limited to 256 Mbytes. In regular-command protocol, if DMM = 1, DEVSIZE[4:0] indicates the total capacity of the two devices together.

pub fn set_devsize(&mut self, val: u8)

Device size This field defines the size of the external device using the following formula: Number of bytes in device = 2^[DEVSIZE+1]. DEVSIZE+1 is effectively the number of address bits required to address the external device. The device capacity can be up to 4 Gbytes (addressed using 32-bits) in indirect mode, but the addressable space in memory-mapped mode is limited to 256 Mbytes. In regular-command protocol, if DMM = 1, DEVSIZE[4:0] indicates the total capacity of the two devices together.

pub const fn mtyp(&self) -> Mtyp

Memory type This bit indicates the type of memory to be supported. Note: In this mode, DQS signal polarity is inverted with respect to the memory clock signal. This is the default value and care must be taken to change MTYP[2:0] for memories different from Micron. Others: Reserved

pub fn set_mtyp(&mut self, val: Mtyp)

Memory type This bit indicates the type of memory to be supported. Note: In this mode, DQS signal polarity is inverted with respect to the memory clock signal. This is the default value and care must be taken to change MTYP[2:0] for memories different from Micron. Others: Reserved

Trait Implementations

impl Clone for Dcr1

fn clone(&self) -> Dcr1

Returns a duplicate of the value.

const fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Dcr1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Dcr1

fn default() -> Dcr1

Returns the “default value” for a type.

impl PartialEq for Dcr1

fn eq(&self, other: &Dcr1) -> bool

Tests for self and other values to be equal, and is used by ==.

const fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Dcr1

impl Eq for Dcr1

impl StructuralPartialEq for Dcr1