Struct Ahb1enr
#[repr(transparent)]pub struct Ahb1enr(pub u32);
Expand description
RCC AHB1 peripheral clock enable register
Tuple Fields§
§0: u32
Implementations§
§impl Ahb1enr
impl Ahb1enr
pub fn set_gpdma1en(&mut self, val: bool)
pub fn set_gpdma1en(&mut self, val: bool)
GPDMA1 clock enable Set and cleared by software.
pub fn set_cordicen(&mut self, val: bool)
pub fn set_cordicen(&mut self, val: bool)
CORDIC clock enable Set and cleared by software.
pub fn set_fmacen(&mut self, val: bool)
pub fn set_fmacen(&mut self, val: bool)
FMAC clock enable Set and reset by software.
pub fn set_mdf1en(&mut self, val: bool)
pub fn set_mdf1en(&mut self, val: bool)
MDF1 clock enable Set and reset by software.
pub const fn flashen(&self) -> bool
pub const fn flashen(&self) -> bool
FLASH clock enable Set and cleared by software. This bit can be disabled only when the Flash memory is in power down mode.
pub fn set_flashen(&mut self, val: bool)
pub fn set_flashen(&mut self, val: bool)
FLASH clock enable Set and cleared by software. This bit can be disabled only when the Flash memory is in power down mode.
pub fn set_tscen(&mut self, val: bool)
pub fn set_tscen(&mut self, val: bool)
Touch sensing controller clock enable Set and cleared by software.
pub fn set_ramcfgen(&mut self, val: bool)
pub fn set_ramcfgen(&mut self, val: bool)
RAMCFG clock enable Set and cleared by software.
pub fn set_dma2den(&mut self, val: bool)
pub fn set_dma2den(&mut self, val: bool)
DMA2D clock enable Set and cleared by software.
pub fn set_gtzc1en(&mut self, val: bool)
pub fn set_gtzc1en(&mut self, val: bool)
GTZC1 clock enable Set and reset by software.
pub fn set_bkpsramen(&mut self, val: bool)
pub fn set_bkpsramen(&mut self, val: bool)
BKPSRAM clock enable Set and reset by software.
pub const fn dcache1en(&self) -> bool
pub const fn dcache1en(&self) -> bool
DCACHE1 clock enable Set and reset by software. Note: DCACHE1 clock must be enabled when external memories are accessed through OCTOSPI1, OCTOSPI2 or FSMC, even if the DCACHE1 is bypassed.
pub fn set_dcache1en(&mut self, val: bool)
pub fn set_dcache1en(&mut self, val: bool)
DCACHE1 clock enable Set and reset by software. Note: DCACHE1 clock must be enabled when external memories are accessed through OCTOSPI1, OCTOSPI2 or FSMC, even if the DCACHE1 is bypassed.
pub fn set_sram1en(&mut self, val: bool)
pub fn set_sram1en(&mut self, val: bool)
SRAM1 clock enable Set and reset by software.