Struct Otg

pub struct Otg(pub *mut u8);

USB on the go

Tuple Fields

0: *mut u8

Implementations

impl Otg

pub fn gotgctl(self) -> Reg<Gotgctl, RW>

Control and status register

pub fn gotgint(self) -> Reg<Gotgint, RW>

Interrupt register

pub fn gahbcfg(self) -> Reg<Gahbcfg, RW>

AHB configuration register

pub fn gusbcfg(self) -> Reg<Gusbcfg, RW>

USB configuration register

pub fn grstctl(self) -> Reg<Grstctl, RW>

Reset register

pub fn gintsts(self) -> Reg<Gintsts, RW>

Core interrupt register

pub fn gintmsk(self) -> Reg<Gintmsk, RW>

Interrupt mask register

pub fn grxstsr(self) -> Reg<Grxsts, R>

Receive status debug read register

pub fn grxstsp(self) -> Reg<Grxsts, R>

Status read and pop register

pub fn grxfsiz(self) -> Reg<Grxfsiz, RW>

Receive FIFO size register

pub fn dieptxf0(self) -> Reg<Fsiz, RW>

Endpoint 0 transmit FIFO size register (device mode)

pub fn hnptxfsiz(self) -> Reg<Fsiz, RW>

Non-periodic transmit FIFO size register (host mode)

pub fn hnptxsts(self) -> Reg<Hnptxsts, R>

Non-periodic transmit FIFO/queue status register (host mode)

pub fn gi2cctl(self) -> Reg<Gi2cctl, RW>

OTG I2C access register

pub fn gccfg_v1(self) -> Reg<GccfgV1, RW>

General core configuration register, for core_id 0x0000_1xxx

pub fn gccfg_v2(self) -> Reg<GccfgV2, RW>

General core configuration register, for core_id 0x0000_[23]xxx

pub fn cid(self) -> Reg<Cid, RW>

Core ID register

pub fn glpmcfg(self) -> Reg<Glpmcfg, RW>

OTG core LPM configuration register

pub fn hptxfsiz(self) -> Reg<Fsiz, RW>

Host periodic transmit FIFO size register

pub fn dieptxf(self, n: usize) -> Reg<Fsiz, RW>

Device IN endpoint transmit FIFO size register

pub fn hcfg(self) -> Reg<Hcfg, RW>

Host configuration register

pub fn hfir(self) -> Reg<Hfir, RW>

Host frame interval register

pub fn hfnum(self) -> Reg<Hfnum, R>

Host frame number/frame time remaining register

pub fn hptxsts(self) -> Reg<Hptxsts, RW>

Periodic transmit FIFO/queue status register

pub fn haint(self) -> Reg<Haint, R>

Host all channels interrupt register

pub fn haintmsk(self) -> Reg<Haintmsk, RW>

Host all channels interrupt mask register

pub fn hprt(self) -> Reg<Hprt, RW>

Host port control and status register

pub fn hcchar(self, n: usize) -> Reg<Hcchar, RW>

Host channel characteristics register

pub fn hcsplt(self, n: usize) -> Reg<u32, RW>

Host channel split control register

pub fn hcint(self, n: usize) -> Reg<Hcint, RW>

Host channel interrupt register

pub fn hcintmsk(self, n: usize) -> Reg<Hcintmsk, RW>

Host channel mask register

pub fn hctsiz(self, n: usize) -> Reg<Hctsiz, RW>

Host channel transfer size register

pub fn dcfg(self) -> Reg<Dcfg, RW>

Device configuration register

pub fn dctl(self) -> Reg<Dctl, RW>

Device control register

pub fn dsts(self) -> Reg<Dsts, R>

Device status register

pub fn diepmsk(self) -> Reg<Diepmsk, RW>

Device IN endpoint common interrupt mask register

pub fn doepmsk(self) -> Reg<Doepmsk, RW>

Device OUT endpoint common interrupt mask register

pub fn daint(self) -> Reg<Daint, R>

Device all endpoints interrupt register

pub fn daintmsk(self) -> Reg<Daintmsk, RW>

All endpoints interrupt mask register

pub fn dvbusdis(self) -> Reg<Dvbusdis, RW>

Device VBUS discharge time register

pub fn dvbuspulse(self) -> Reg<Dvbuspulse, RW>

Device VBUS pulsing time register

pub fn diepempmsk(self) -> Reg<Diepempmsk, RW>

Device IN endpoint FIFO empty interrupt mask register

pub fn diepctl(self, n: usize) -> Reg<Diepctl, RW>

Device IN endpoint control register

pub fn diepint(self, n: usize) -> Reg<Diepint, RW>

Device IN endpoint interrupt register

pub fn dieptsiz(self, n: usize) -> Reg<Dieptsiz, RW>

Device IN endpoint transfer size register

pub fn dtxfsts(self, n: usize) -> Reg<Dtxfsts, R>

Device IN endpoint transmit FIFO status register

pub fn doepctl(self, n: usize) -> Reg<Doepctl, RW>

Device OUT endpoint control register

pub fn doepint(self, n: usize) -> Reg<Doepint, RW>

Device OUT endpoint interrupt register

pub fn doeptsiz(self, n: usize) -> Reg<Doeptsiz, RW>

Device OUT endpoint transfer size register

pub fn pcgcctl(self) -> Reg<Pcgcctl, RW>

Power and clock gating control register

pub fn fifo(self, n: usize) -> Reg<Fifo, RW>

Device endpoint / host channel FIFO register

Trait Implementations

impl Clone for Otg

fn clone(&self) -> Otg

Returns a duplicate of the value.

const fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Otg

fn eq(&self, other: &Otg) -> bool

Tests for self and other values to be equal, and is used by ==.

const fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Otg

impl Eq for Otg

impl Send for Otg

impl StructuralPartialEq for Otg

impl Sync for Otg