Struct stm32_metapac::syscfg::regs::Cfgr1
#[repr(transparent)]pub struct Cfgr1(pub u32);Expand description
configuration register 1
Tuple Fields§
§0: u32Implementations§
§impl Cfgr1
impl Cfgr1
pub fn set_mem_mode(&mut self, val: MemMode)
pub fn set_mem_mode(&mut self, val: MemMode)
Memory mapping selection bits
pub const fn pa11_pa12_rmp(&self) -> bool
pub const fn pa11_pa12_rmp(&self) -> bool
PA11 and PA12 remapping bit for small packages (28 and 20 pins) 0: Pin pair PA9/PA10 mapped on the pins 1: Pin pair PA11/PA12 mapped instead of PA9/PA10
pub fn set_pa11_pa12_rmp(&mut self, val: bool)
pub fn set_pa11_pa12_rmp(&mut self, val: bool)
PA11 and PA12 remapping bit for small packages (28 and 20 pins) 0: Pin pair PA9/PA10 mapped on the pins 1: Pin pair PA11/PA12 mapped instead of PA9/PA10
pub fn set_ir_mod(&mut self, val: IrMod)
pub fn set_ir_mod(&mut self, val: IrMod)
IR Modulation Envelope signal selection
pub const fn adc_dma_rmp(&self) -> bool
pub const fn adc_dma_rmp(&self) -> bool
ADC DMA remapping bit 0: ADC DMA request mapped on DMA channel 1 1: ADC DMA request mapped on DMA channel 2
pub fn set_adc_dma_rmp(&mut self, val: bool)
pub fn set_adc_dma_rmp(&mut self, val: bool)
ADC DMA remapping bit 0: ADC DMA request mapped on DMA channel 1 1: ADC DMA request mapped on DMA channel 2
pub const fn usart1_tx_dma_rmp(&self) -> bool
pub const fn usart1_tx_dma_rmp(&self) -> bool
USART1_TX DMA remapping bit 0: USART1_TX DMA request mapped on DMA channel 2 1: USART1_TX DMA request mapped on DMA channel 4
pub fn set_usart1_tx_dma_rmp(&mut self, val: bool)
pub fn set_usart1_tx_dma_rmp(&mut self, val: bool)
USART1_TX DMA remapping bit 0: USART1_TX DMA request mapped on DMA channel 2 1: USART1_TX DMA request mapped on DMA channel 4
pub const fn usart1_rx_dma_rmp(&self) -> bool
pub const fn usart1_rx_dma_rmp(&self) -> bool
USART1_RX DMA request remapping bit 0: USART1_RX DMA request mapped on DMA channel 3 1: USART1_RX DMA request mapped on DMA channel 5
pub fn set_usart1_rx_dma_rmp(&mut self, val: bool)
pub fn set_usart1_rx_dma_rmp(&mut self, val: bool)
USART1_RX DMA request remapping bit 0: USART1_RX DMA request mapped on DMA channel 3 1: USART1_RX DMA request mapped on DMA channel 5
pub const fn tim16_dma_rmp(&self) -> bool
pub const fn tim16_dma_rmp(&self) -> bool
TIM16 DMA request remapping bit 0: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 3 1: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 4
pub fn set_tim16_dma_rmp(&mut self, val: bool)
pub fn set_tim16_dma_rmp(&mut self, val: bool)
TIM16 DMA request remapping bit 0: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 3 1: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 4
pub const fn tim17_dma_rmp(&self) -> bool
pub const fn tim17_dma_rmp(&self) -> bool
TIM17 DMA request remapping bit 0: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 1 1: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 2
pub fn set_tim17_dma_rmp(&mut self, val: bool)
pub fn set_tim17_dma_rmp(&mut self, val: bool)
TIM17 DMA request remapping bit 0: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 1 1: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 2
pub const fn tim16_dma_rmp2(&self) -> bool
pub const fn tim16_dma_rmp2(&self) -> bool
TIM16 alternate DMA request remapping bit 0: TIM16 DMA request mapped according to TIM16_DMA_RMP bit 1: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 6
pub fn set_tim16_dma_rmp2(&mut self, val: bool)
pub fn set_tim16_dma_rmp2(&mut self, val: bool)
TIM16 alternate DMA request remapping bit 0: TIM16 DMA request mapped according to TIM16_DMA_RMP bit 1: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 6
pub const fn tim17_dma_rmp2(&self) -> bool
pub const fn tim17_dma_rmp2(&self) -> bool
TIM17 alternate DMA request remapping bit 0: TIM17 DMA request mapped according to TIM16_DMA_RMP bit 1: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 7
pub fn set_tim17_dma_rmp2(&mut self, val: bool)
pub fn set_tim17_dma_rmp2(&mut self, val: bool)
TIM17 alternate DMA request remapping bit 0: TIM17 DMA request mapped according to TIM16_DMA_RMP bit 1: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 7
pub const fn i2c_pb6_fmp(&self) -> Fmp
pub const fn i2c_pb6_fmp(&self) -> Fmp
Fast Mode Plus (FM plus) driving capability activation bits. 0: PB6 pin operate in standard mode 1: I2C FM+ mode enabled on PB6 and the Speed control is bypassed
pub fn set_i2c_pb6_fmp(&mut self, val: Fmp)
pub fn set_i2c_pb6_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM plus) driving capability activation bits. 0: PB6 pin operate in standard mode 1: I2C FM+ mode enabled on PB6 and the Speed control is bypassed
pub const fn i2c_pb7_fmp(&self) -> Fmp
pub const fn i2c_pb7_fmp(&self) -> Fmp
Fast Mode Plus (FM+) driving capability activation bits. 0: PB7 pin operate in standard mode 1: I2C FM+ mode enabled on PB7 and the Speed control is bypassed
pub fn set_i2c_pb7_fmp(&mut self, val: Fmp)
pub fn set_i2c_pb7_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM+) driving capability activation bits. 0: PB7 pin operate in standard mode 1: I2C FM+ mode enabled on PB7 and the Speed control is bypassed
pub const fn i2c_pb8_fmp(&self) -> Fmp
pub const fn i2c_pb8_fmp(&self) -> Fmp
Fast Mode Plus (FM+) driving capability activation bits. 0: PB8 pin operate in standard mode 1: I2C FM+ mode enabled on PB8 and the Speed control is bypassed
pub fn set_i2c_pb8_fmp(&mut self, val: Fmp)
pub fn set_i2c_pb8_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM+) driving capability activation bits. 0: PB8 pin operate in standard mode 1: I2C FM+ mode enabled on PB8 and the Speed control is bypassed
pub const fn i2c_pb9_fmp(&self) -> Fmp
pub const fn i2c_pb9_fmp(&self) -> Fmp
Fast Mode Plus (FM+) driving capability activation bits. 0: PB9 pin operate in standard mode 1: I2C FM+ mode enabled on PB9 and the Speed control is bypassed
pub fn set_i2c_pb9_fmp(&mut self, val: Fmp)
pub fn set_i2c_pb9_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM+) driving capability activation bits. 0: PB9 pin operate in standard mode 1: I2C FM+ mode enabled on PB9 and the Speed control is bypassed
pub const fn i2c1_fmp(&self) -> Fmp
pub const fn i2c1_fmp(&self) -> Fmp
FM+ driving capability activation for I2C1 0: FM+ mode is controlled by I2C_Pxx_FMP bits only 1: FM+ mode is enabled on all I2C1 pins selected through selection bits in GPIOx_AFR registers
pub fn set_i2c1_fmp(&mut self, val: Fmp)
pub fn set_i2c1_fmp(&mut self, val: Fmp)
FM+ driving capability activation for I2C1 0: FM+ mode is controlled by I2C_Pxx_FMP bits only 1: FM+ mode is enabled on all I2C1 pins selected through selection bits in GPIOx_AFR registers
pub const fn i2c2_fmp(&self) -> Fmp
pub const fn i2c2_fmp(&self) -> Fmp
FM+ driving capability activation for I2C2 0: FM+ mode is controlled by I2C_Pxx_FMP bits only 1: FM+ mode is enabled on all I2C2 pins selected through selection bits in GPIOx_AFR registers
pub fn set_i2c2_fmp(&mut self, val: Fmp)
pub fn set_i2c2_fmp(&mut self, val: Fmp)
FM+ driving capability activation for I2C2 0: FM+ mode is controlled by I2C_Pxx_FMP bits only 1: FM+ mode is enabled on all I2C2 pins selected through selection bits in GPIOx_AFR registers
pub const fn i2c_pa9_fmp(&self) -> Fmp
pub const fn i2c_pa9_fmp(&self) -> Fmp
Fast Mode Plus (FM+) driving capability activation bits 0: PA9 pin operate in standard mode 1: I2C FM+ mode enabled on PA9 and the Speed control is bypassed
pub fn set_i2c_pa9_fmp(&mut self, val: Fmp)
pub fn set_i2c_pa9_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM+) driving capability activation bits 0: PA9 pin operate in standard mode 1: I2C FM+ mode enabled on PA9 and the Speed control is bypassed
pub const fn i2c_pa10_fmp(&self) -> Fmp
pub const fn i2c_pa10_fmp(&self) -> Fmp
Fast Mode Plus (FM+) driving capability activation bits 0: PA10 pin operate in standard mode 1: I2C FM+ mode enabled on PA10 and the Speed control is bypassed
pub fn set_i2c_pa10_fmp(&mut self, val: Fmp)
pub fn set_i2c_pa10_fmp(&mut self, val: Fmp)
Fast Mode Plus (FM+) driving capability activation bits 0: PA10 pin operate in standard mode 1: I2C FM+ mode enabled on PA10 and the Speed control is bypassed
pub const fn spi2_dma_rmp(&self) -> bool
pub const fn spi2_dma_rmp(&self) -> bool
SPI2 DMA request remapping bit 0: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 4 and 5 respectively 1: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 6 and 7 respectively
pub fn set_spi2_dma_rmp(&mut self, val: bool)
pub fn set_spi2_dma_rmp(&mut self, val: bool)
SPI2 DMA request remapping bit 0: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 4 and 5 respectively 1: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 6 and 7 respectively
pub const fn usart2_dma_rmp(&self) -> bool
pub const fn usart2_dma_rmp(&self) -> bool
USART2 DMA request remapping bit 0: USART2_RX and USART2_TX DMA requests mapped on DMA channel 5 and 4 respectively 1: USART2_RX and USART2_TX DMA requests mapped on DMA channel 6 and 7 respectively
pub fn set_usart2_dma_rmp(&mut self, val: bool)
pub fn set_usart2_dma_rmp(&mut self, val: bool)
USART2 DMA request remapping bit 0: USART2_RX and USART2_TX DMA requests mapped on DMA channel 5 and 4 respectively 1: USART2_RX and USART2_TX DMA requests mapped on DMA channel 6 and 7 respectively
pub const fn usart3_dma_rmp(&self) -> bool
pub const fn usart3_dma_rmp(&self) -> bool
USART3 DMA request remapping bit 0: USART3_RX and USART3_TX DMA requests mapped on DMA channel 6 and 7 respectively (or simply disabled on STM32F0x0) 1: USART3_RX and USART3_TX DMA requests mapped on DMA channel 3 and 2 respectively
pub fn set_usart3_dma_rmp(&mut self, val: bool)
pub fn set_usart3_dma_rmp(&mut self, val: bool)
USART3 DMA request remapping bit 0: USART3_RX and USART3_TX DMA requests mapped on DMA channel 6 and 7 respectively (or simply disabled on STM32F0x0) 1: USART3_RX and USART3_TX DMA requests mapped on DMA channel 3 and 2 respectively
pub const fn i2c1_dma_rmp(&self) -> bool
pub const fn i2c1_dma_rmp(&self) -> bool
I2C1 DMA request remapping bit 0: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 3 and 2 respectively 1: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 7 and 6 respectively
pub fn set_i2c1_dma_rmp(&mut self, val: bool)
pub fn set_i2c1_dma_rmp(&mut self, val: bool)
I2C1 DMA request remapping bit 0: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 3 and 2 respectively 1: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 7 and 6 respectively
pub const fn tim1_dma_rmp(&self) -> bool
pub const fn tim1_dma_rmp(&self) -> bool
TIM1 DMA request remapping bit 0: TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 2, 3 and 4 respectively 1: TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 6
pub fn set_tim1_dma_rmp(&mut self, val: bool)
pub fn set_tim1_dma_rmp(&mut self, val: bool)
TIM1 DMA request remapping bit 0: TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 2, 3 and 4 respectively 1: TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 6
pub const fn tim2_dma_rmp(&self) -> bool
pub const fn tim2_dma_rmp(&self) -> bool
TIM2 DMA request remapping bit 0: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 3 and 4 respectively 1: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 7
pub fn set_tim2_dma_rmp(&mut self, val: bool)
pub fn set_tim2_dma_rmp(&mut self, val: bool)
TIM2 DMA request remapping bit 0: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 3 and 4 respectively 1: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 7
pub const fn tim3_dma_rmp(&self) -> bool
pub const fn tim3_dma_rmp(&self) -> bool
TIM3 DMA request remapping bit 0: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 4 1: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 6
pub fn set_tim3_dma_rmp(&mut self, val: bool)
pub fn set_tim3_dma_rmp(&mut self, val: bool)
TIM3 DMA request remapping bit 0: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 4 1: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 6