Module stm32_metapac::eth::regs

Structs

• Dmabmr
  Ethernet DMA bus mode register
• Dmachrbar
  Ethernet DMA current host receive buffer address register
• Dmachrdr
  Ethernet DMA current host receive descriptor register
• Dmachtbar
  Ethernet DMA current host transmit buffer address register
• Dmachtdr
  Ethernet DMA current host transmit descriptor register
• Dmaier
  Ethernet DMA interrupt enable register
• Dmamfbocr
  Ethernet DMA missed frame and buffer overflow counter register
• Dmaomr
  Ethernet DMA operation mode register
• Dmardlar
  Ethernet DMA receive descriptor list address register
• Dmarpdr
  EHERNET DMA receive poll demand register
• Dmasr
  Ethernet DMA status register
• Dmatdlar
  Ethernet DMA transmit descriptor list address register
• Dmatpdr
  Ethernet DMA transmit poll demand register
• Maca0hr
  Ethernet MAC address 0 high register
• Maca0lr
  Ethernet MAC address 0 low register
• Macahr
  Ethernet MAC address 1/2/3 high register
• Macalr
  Ethernet MAC address 1/2/3 low register
• Maccr
  Ethernet MAC configuration register
• Macdbgr
  Ethernet MAC debug register
• Macfcr
  Ethernet MAC flow control register
• Macffr
  Ethernet MAC frame filter register
• Machthr
  Ethernet MAC hash table high register
• Machtlr
  Ethernet MAC hash table low register
• Macimr
  Ethernet MAC interrupt mask register
• Macmiiar
  Ethernet MAC MII address register
• Macmiidr
  Ethernet MAC MII data register
• Macpmtcsr
  Ethernet MAC PMT control and status register
• Macsr
  Ethernet MAC interrupt status register
• Macvlantr
  Ethernet MAC VLAN tag register
• Mmccr
  Ethernet MMC control register
• Mmcrfaecr
  Ethernet MMC received frames with alignment error counter register
• Mmcrfcecr
  Ethernet MMC received frames with CRC error counter register
• Mmcrgufcr
  MMC received good unicast frames counter register
• Mmcrimr
  Ethernet MMC receive interrupt mask register
• Mmcrir
  Ethernet MMC receive interrupt register
• Mmctgfcr
  Ethernet MMC transmitted good frames counter register
• Mmctgfmsccr
  Ethernet MMC transmitted good frames after more than a single collision
• Mmctgfsccr
  Ethernet MMC transmitted good frames after a single collision counter
• Mmctimr
  Ethernet MMC transmit interrupt mask register
• Mmctir
  Ethernet MMC transmit interrupt register
• Ptpppscr
  Ethernet PTP PPS control register
• Ptpssir
  Ethernet PTP subsecond increment register
• Ptptsar
  Ethernet PTP time stamp addend register
• Ptptscr
  Ethernet PTP time stamp control register
• Ptptshr
  Ethernet PTP time stamp high register
• Ptptshur
  Ethernet PTP time stamp high update register
• Ptptslr
  Ethernet PTP time stamp low register
• Ptptslur
  Ethernet PTP time stamp low update register
• Ptptssr
  Ethernet PTP time stamp status register
• Ptptthr
  Ethernet PTP target time high register
• Ptpttlr
  Ethernet PTP target time low register