Struct stm32_metapac::syscfg::regs::Cfgr3
#[repr(transparent)]pub struct Cfgr3(pub u32);
Expand description
configuration register 3
Tuple Fields§
§0: u32
Implementations§
§impl Cfgr3
impl Cfgr3
pub const fn spi1_rx_dma_rmp(&self) -> Spi1RxDmaRmp
pub const fn spi1_rx_dma_rmp(&self) -> Spi1RxDmaRmp
SPI1_RX DMA remapping bit
pub fn set_spi1_rx_dma_rmp(&mut self, val: Spi1RxDmaRmp)
pub fn set_spi1_rx_dma_rmp(&mut self, val: Spi1RxDmaRmp)
SPI1_RX DMA remapping bit
pub const fn spi1_tx_dma_rmp(&self) -> Spi1TxDmaRmp
pub const fn spi1_tx_dma_rmp(&self) -> Spi1TxDmaRmp
SPI1_TX DMA remapping bit
pub fn set_spi1_tx_dma_rmp(&mut self, val: Spi1TxDmaRmp)
pub fn set_spi1_tx_dma_rmp(&mut self, val: Spi1TxDmaRmp)
SPI1_TX DMA remapping bit
pub const fn i2c1_rx_dma_rmp(&self) -> I2c1RxDmaRmp
pub const fn i2c1_rx_dma_rmp(&self) -> I2c1RxDmaRmp
I2C1_RX DMA remapping bit
pub fn set_i2c1_rx_dma_rmp(&mut self, val: I2c1RxDmaRmp)
pub fn set_i2c1_rx_dma_rmp(&mut self, val: I2c1RxDmaRmp)
I2C1_RX DMA remapping bit
pub const fn i2c1_tx_dma_rmp(&self) -> I2c1TxDmaRmp
pub const fn i2c1_tx_dma_rmp(&self) -> I2c1TxDmaRmp
I2C1_TX DMA remapping bit
pub fn set_i2c1_tx_dma_rmp(&mut self, val: I2c1TxDmaRmp)
pub fn set_i2c1_tx_dma_rmp(&mut self, val: I2c1TxDmaRmp)
I2C1_TX DMA remapping bit
pub const fn adc2_dma_rmp(&self) -> Adc2DmaRmpCfgr3
pub const fn adc2_dma_rmp(&self) -> Adc2DmaRmpCfgr3
ADC2 DMA remapping bit
pub fn set_adc2_dma_rmp(&mut self, val: Adc2DmaRmpCfgr3)
pub fn set_adc2_dma_rmp(&mut self, val: Adc2DmaRmpCfgr3)
ADC2 DMA remapping bit
pub const fn dac1_trig3_rmp(&self) -> Dac1Trig3Rmp
pub const fn dac1_trig3_rmp(&self) -> Dac1Trig3Rmp
DAC1_CH1 / DAC1_CH2 Trigger remap
pub fn set_dac1_trig3_rmp(&mut self, val: Dac1Trig3Rmp)
pub fn set_dac1_trig3_rmp(&mut self, val: Dac1Trig3Rmp)
DAC1_CH1 / DAC1_CH2 Trigger remap
pub const fn dac1_trig5_rmp(&self) -> bool
pub const fn dac1_trig5_rmp(&self) -> bool
DAC1_CH1 / DAC1_CH2 Trigger remap 0: Not remapped 1: DAC trigger is HRTIM1_DAC1_TRIG2
pub fn set_dac1_trig5_rmp(&mut self, val: bool)
pub fn set_dac1_trig5_rmp(&mut self, val: bool)
DAC1_CH1 / DAC1_CH2 Trigger remap 0: Not remapped 1: DAC trigger is HRTIM1_DAC1_TRIG2
Trait Implementations§
impl Copy for Cfgr3
impl Eq for Cfgr3
impl StructuralPartialEq for Cfgr3
Auto Trait Implementations§
impl Freeze for Cfgr3
impl RefUnwindSafe for Cfgr3
impl Send for Cfgr3
impl Sync for Cfgr3
impl Unpin for Cfgr3
impl UnwindSafe for Cfgr3
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
🔬This is a nightly-only experimental API. (
clone_to_uninit
)