Struct stm32_metapac::rcc::regs::Dckcfgr

#[repr(transparent)]
pub struct Dckcfgr(pub u32);

Dedicated Clock Configuration Register

Tuple Fields

0: u32

Implementations

impl Dckcfgr

pub const fn plli2sdivq(&self) -> Plli2sdivq

PLLI2S division factor for SAI1 clock

pub fn set_plli2sdivq(&mut self, val: Plli2sdivq)

PLLI2S division factor for SAI1 clock

pub const fn plli2sdivr(&self) -> Plli2sdivr

PLLI2S division factor for SAI1 A/B clock

pub fn set_plli2sdivr(&mut self, val: Plli2sdivr)

PLLI2S division factor for SAI1 A/B clock

pub const fn plldivr(&self) -> Plldivr

PLL division factor for SAI1 A/B clock

pub fn set_plldivr(&mut self, val: Plldivr)

PLL division factor for SAI1 A/B clock

pub const fn pllsaidivq(&self) -> Pllsaidivq

PLLSAI division factor for SAI1 clock

pub fn set_pllsaidivq(&mut self, val: Pllsaidivq)

PLLSAI division factor for SAI1 clock

pub const fn ckdfsdm2asel(&self) -> Ckdfsdmasel

DFSDM2 audio clock selection

pub fn set_ckdfsdm2asel(&mut self, val: Ckdfsdmasel)

DFSDM2 audio clock selection

pub const fn ckdfsdm1asel(&self) -> Ckdfsdmasel

DFSDM1 audio clock selection

pub fn set_ckdfsdm1asel(&mut self, val: Ckdfsdmasel)

DFSDM1 audio clock selection

pub const fn pllsaidivr(&self) -> Pllsaidivr

division factor for LCD_CLK

pub fn set_pllsaidivr(&mut self, val: Pllsaidivr)

division factor for LCD_CLK

pub const fn sai1asrc(&self) -> Saiasrc

SAI1-A clock source selection

pub fn set_sai1asrc(&mut self, val: Saiasrc)

SAI1-A clock source selection

pub const fn sai1src(&self) -> Sai1src

SAI1 clock source selection

pub fn set_sai1src(&mut self, val: Sai1src)

SAI1 clock source selection

pub const fn sai1bsrc(&self) -> Saibsrc

SAI1-B clock source selection

pub fn set_sai1bsrc(&mut self, val: Saibsrc)

SAI1-B clock source selection

pub const fn sai2src(&self) -> Sai2src

SAI2 clock source selection

pub fn set_sai2src(&mut self, val: Sai2src)

SAI2 clock source selection

pub const fn timpre(&self) -> Timpre

Timers clocks prescalers selection

pub fn set_timpre(&mut self, val: Timpre)

Timers clocks prescalers selection

pub const fn i2s1src(&self) -> I2s1src

I2S APB1 clocks source selection (I2S2/3)

pub fn set_i2s1src(&mut self, val: I2s1src)

I2S APB1 clocks source selection (I2S2/3)

pub const fn i2ssrc(&self) -> I2ssrcDckcfgr

I2SSRC

pub fn set_i2ssrc(&mut self, val: I2ssrcDckcfgr)

I2SSRC

pub const fn clk48sel(&self) -> Clk48sel

48 MHz clock source selection

pub fn set_clk48sel(&mut self, val: Clk48sel)

48 MHz clock source selection

pub const fn i2s2src(&self) -> I2s1src

I2S APB2 clocks source selection (I2S1/4/5)

pub fn set_i2s2src(&mut self, val: I2s1src)

I2S APB2 clocks source selection (I2S1/4/5)

pub const fn sdiosel(&self) -> Sdiosel

SDIO clock source selection

pub fn set_sdiosel(&mut self, val: Sdiosel)

SDIO clock source selection

pub const fn dsisel(&self) -> Dsisel

DSI clock source selection

pub fn set_dsisel(&mut self, val: Dsisel)

DSI clock source selection

pub const fn ckdfsdm1sel(&self) -> Ckdfsdmsel

DFSDM1 Kernel clock selection

pub fn set_ckdfsdm1sel(&mut self, val: Ckdfsdmsel)

DFSDM1 Kernel clock selection

Trait Implementations

impl Clone for Dckcfgr

fn clone(&self) -> Dckcfgr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Dckcfgr

fn default() -> Dckcfgr

Returns the “default value” for a type.

impl PartialEq for Dckcfgr

fn eq(&self, other: &Dckcfgr) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Dckcfgr

impl Eq for Dckcfgr

impl StructuralEq for Dckcfgr

impl StructuralPartialEq for Dckcfgr