Module stm32_metapac::rcc::regs

Structs

• Ahb1enr
  AHB1 peripheral clock register
• Ahb1lpenr
  AHB1 peripheral clock enable in low power mode register
• Ahb1rstr
  AHB1 peripheral reset register
• Ahb2enr
  AHB2 peripheral clock enable register
• Ahb2lpenr
  AHB2 peripheral clock enable in low power mode register
• Ahb2rstr
  AHB2 peripheral reset register
• Ahb3enr
  AHB3 peripheral clock enable register
• Ahb3lpenr
  AHB3 peripheral clock enable in low power mode register
• Ahb3rstr
  AHB3 peripheral reset register
• Apb1enr
  APB1 peripheral clock enable register
• Apb1lpenr
  APB1 peripheral clock enable in low power mode register
• Apb1rstr
  APB1 peripheral reset register
• Apb2enr
  APB2 peripheral clock enable register
• Apb2lpenr
  APB2 peripheral clock enabled in low power mode register
• Apb2rstr
  APB2 peripheral reset register
• Bdcr
  Backup domain control register
• Cfgr
  clock configuration register
• Cir
  clock interrupt register
• Cr
  clock control register
• Csr
  clock control & status register
• Dckcfgr1
  dedicated clocks configuration register
• Dckcfgr2
  dedicated clocks configuration register
• Pllcfgr
  PLL configuration register
• Plli2scfgr
  PLLI2S configuration register
• Pllsaicfgr
  PLL configuration register
• Sscgr
  spread spectrum clock generation register