Enum stm32_metapac::timer::vals::Mms2
#[repr(u8)]pub enum Mms2 {
Show 16 variants
RESET = 0,
ENABLE = 1,
UPDATE = 2,
COMPAREPULSE = 3,
COMPAREOC1 = 4,
COMPAREOC2 = 5,
COMPAREOC3 = 6,
COMPAREOC4 = 7,
COMPAREOC5 = 8,
COMPAREOC6 = 9,
COMPAREPULSE_OC4 = 10,
COMPAREPULSE_OC6 = 11,
COMPAREPULSE_OC4_OR_OC6_RISING = 12,
COMPAREPULSE_OC4_RISING_OR_OC6_FALLING = 13,
COMPAREPULSE_OC5_OR_OC6_RISING = 14,
COMPAREPULSE_OC5_RISING_OR_OC6_FALLING = 15,
}
Variants§
RESET = 0
The UG bit from the TIMx_EGR register is used as TRGO2
ENABLE = 1
The counter enable signal, CNT_EN, is used as TRGO2
UPDATE = 2
The update event is selected as TRGO2
COMPAREPULSE = 3
TRGO2 send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
COMPAREOC1 = 4
OC1REF signal is used as TRGO2
COMPAREOC2 = 5
OC2REF signal is used as TRGO2
COMPAREOC3 = 6
OC3REF signal is used as TRGO2
COMPAREOC4 = 7
OC4REF signal is used as TRGO2
COMPAREOC5 = 8
OC5REF signal is used as TRGO2
COMPAREOC6 = 9
OC6REF signal is used as TRGO2
COMPAREPULSE_OC4 = 10
OC4REF rising or falling edges generate pulses on TRGO2
COMPAREPULSE_OC6 = 11
OC6REF rising or falling edges generate pulses on TRGO2
COMPAREPULSE_OC4_OR_OC6_RISING = 12
OC4REF or OC6REF rising edges generate pulses on TRGO2
COMPAREPULSE_OC4_RISING_OR_OC6_FALLING = 13
OC4REF rising or OC6REF falling edges generate pulses on TRGO2
COMPAREPULSE_OC5_OR_OC6_RISING = 14
OC5REF or OC6REF rising edges generate pulses on TRGO2
COMPAREPULSE_OC5_RISING_OR_OC6_FALLING = 15
OC5REF rising or OC6REF falling edges generate pulses on TRGO2
Implementations§
Trait Implementations§
§impl Ord for Mms2
impl Ord for Mms2
§impl PartialOrd for Mms2
impl PartialOrd for Mms2
§fn partial_cmp(&self, other: &Mms2) -> Option<Ordering>
fn partial_cmp(&self, other: &Mms2) -> Option<Ordering>
1.0.0 · source§fn le(&self, other: &Rhs) -> bool
fn le(&self, other: &Rhs) -> bool
self
and other
) and is used by the <=
operator. Read more