Enum stm32_metapac::Interrupt

pub enum Interrupt {
    WWDG = 0,
    PVD_PVM = 1,
    RTC_TAMP_LSECSS = 2,
    RTC_WKUP = 3,
    FLASH = 4,
    RCC = 5,
    EXTI0 = 6,
    EXTI1 = 7,
    EXTI2 = 8,
    EXTI3 = 9,
    EXTI4 = 10,
    DMA1_CHANNEL1 = 11,
    DMA1_CHANNEL2 = 12,
    DMA1_CHANNEL3 = 13,
    DMA1_CHANNEL4 = 14,
    DMA1_CHANNEL5 = 15,
    DMA1_CHANNEL6 = 16,
    DMA1_CHANNEL7 = 17,
    ADC1_2 = 18,
    USB_HP = 19,
    USB_LP = 20,
    FDCAN1_IT0 = 21,
    FDCAN1_IT1 = 22,
    EXTI9_5 = 23,
    TIM1_BRK_TIM15 = 24,
    TIM1_UP_TIM16 = 25,
    TIM1_TRG_COM_TIM17 = 26,
    TIM1_CC = 27,
    TIM2 = 28,
    TIM3 = 29,
    TIM4 = 30,
    I2C1_EV = 31,
    I2C1_ER = 32,
    I2C2_EV = 33,
    I2C2_ER = 34,
    SPI1 = 35,
    SPI2 = 36,
    USART1 = 37,
    USART2 = 38,
    USART3 = 39,
    EXTI15_10 = 40,
    RTC_ALARM = 41,
    USBWAKEUP = 42,
    TIM8_BRK = 43,
    TIM8_UP = 44,
    TIM8_TRG_COM = 45,
    TIM8_CC = 46,
    ADC3 = 47,
    FMC = 48,
    LPTIM1 = 49,
    TIM5 = 50,
    SPI3 = 51,
    UART4 = 52,
    UART5 = 53,
    TIM6_DAC = 54,
    TIM7_DAC = 55,
    DMA2_CHANNEL1 = 56,
    DMA2_CHANNEL2 = 57,
    DMA2_CHANNEL3 = 58,
    DMA2_CHANNEL4 = 59,
    DMA2_CHANNEL5 = 60,
    ADC4 = 61,
    ADC5 = 62,
    UCPD1 = 63,
    COMP1_2_3 = 64,
    COMP4_5_6 = 65,
    COMP7 = 66,
    CRS = 75,
    SAI1 = 76,
    TIM20_BRK = 77,
    TIM20_UP = 78,
    TIM20_TRG_COM = 79,
    TIM20_CC = 80,
    FPU = 81,
    I2C4_EV = 82,
    I2C4_ER = 83,
    SPI4 = 84,
    FDCAN2_IT0 = 86,
    FDCAN2_IT1 = 87,
    FDCAN3_IT0 = 88,
    FDCAN3_IT1 = 89,
    RNG = 90,
    LPUART1 = 91,
    I2C3_EV = 92,
    I2C3_ER = 93,
    DMAMUX_OVR = 94,
    QUADSPI = 95,
    DMA1_CHANNEL8 = 96,
    DMA2_CHANNEL6 = 97,
    DMA2_CHANNEL7 = 98,
    DMA2_CHANNEL8 = 99,
    CORDIC = 100,
    FMAC = 101,
}

Variants

WWDG = 0

0 - WWDG

PVD_PVM = 1

1 - PVD_PVM

RTC_TAMP_LSECSS = 2

2 - RTC_TAMP_LSECSS

RTC_WKUP = 3

3 - RTC_WKUP

FLASH = 4

4 - FLASH

RCC = 5

5 - RCC

EXTI0 = 6

6 - EXTI0

EXTI1 = 7

7 - EXTI1

EXTI2 = 8

8 - EXTI2

EXTI3 = 9

9 - EXTI3

EXTI4 = 10

10 - EXTI4

DMA1_CHANNEL1 = 11

11 - DMA1_CHANNEL1

DMA1_CHANNEL2 = 12

12 - DMA1_CHANNEL2

DMA1_CHANNEL3 = 13

13 - DMA1_CHANNEL3

DMA1_CHANNEL4 = 14

14 - DMA1_CHANNEL4

DMA1_CHANNEL5 = 15

15 - DMA1_CHANNEL5

DMA1_CHANNEL6 = 16

16 - DMA1_CHANNEL6

DMA1_CHANNEL7 = 17

17 - DMA1_CHANNEL7

ADC1_2 = 18

18 - ADC1_2

USB_HP = 19

19 - USB_HP

USB_LP = 20

20 - USB_LP

FDCAN1_IT0 = 21

21 - FDCAN1_IT0

FDCAN1_IT1 = 22

22 - FDCAN1_IT1

EXTI9_5 = 23

23 - EXTI9_5

TIM1_BRK_TIM15 = 24

24 - TIM1_BRK_TIM15

TIM1_UP_TIM16 = 25

25 - TIM1_UP_TIM16

TIM1_TRG_COM_TIM17 = 26

26 - TIM1_TRG_COM_TIM17

TIM1_CC = 27

27 - TIM1_CC

TIM2 = 28

28 - TIM2

TIM3 = 29

29 - TIM3

TIM4 = 30

30 - TIM4

I2C1_EV = 31

31 - I2C1_EV

I2C1_ER = 32

32 - I2C1_ER

I2C2_EV = 33

33 - I2C2_EV

I2C2_ER = 34

34 - I2C2_ER

SPI1 = 35

35 - SPI1

SPI2 = 36

36 - SPI2

USART1 = 37

37 - USART1

USART2 = 38

38 - USART2

USART3 = 39

39 - USART3

EXTI15_10 = 40

40 - EXTI15_10

RTC_ALARM = 41

41 - RTC_ALARM

USBWAKEUP = 42

42 - USBWAKEUP

TIM8_BRK = 43

43 - TIM8_BRK

TIM8_UP = 44

44 - TIM8_UP

TIM8_TRG_COM = 45

45 - TIM8_TRG_COM

TIM8_CC = 46

46 - TIM8_CC

ADC3 = 47

47 - ADC3

FMC = 48

48 - FMC

LPTIM1 = 49

49 - LPTIM1

TIM5 = 50

50 - TIM5

SPI3 = 51

51 - SPI3

UART4 = 52

52 - UART4

UART5 = 53

53 - UART5

TIM6_DAC = 54

54 - TIM6_DAC

TIM7_DAC = 55

55 - TIM7_DAC

DMA2_CHANNEL1 = 56

56 - DMA2_CHANNEL1

DMA2_CHANNEL2 = 57

57 - DMA2_CHANNEL2

DMA2_CHANNEL3 = 58

58 - DMA2_CHANNEL3

DMA2_CHANNEL4 = 59

59 - DMA2_CHANNEL4

DMA2_CHANNEL5 = 60

60 - DMA2_CHANNEL5

ADC4 = 61

61 - ADC4

ADC5 = 62

62 - ADC5

UCPD1 = 63

63 - UCPD1

COMP1_2_3 = 64

64 - COMP1_2_3

COMP4_5_6 = 65

65 - COMP4_5_6

COMP7 = 66

66 - COMP7

CRS = 75

75 - CRS

SAI1 = 76

76 - SAI1

TIM20_BRK = 77

77 - TIM20_BRK

TIM20_UP = 78

78 - TIM20_UP

TIM20_TRG_COM = 79

79 - TIM20_TRG_COM

TIM20_CC = 80

80 - TIM20_CC

FPU = 81

81 - FPU

I2C4_EV = 82

82 - I2C4_EV

I2C4_ER = 83

83 - I2C4_ER

SPI4 = 84

84 - SPI4

FDCAN2_IT0 = 86

86 - FDCAN2_IT0

FDCAN2_IT1 = 87

87 - FDCAN2_IT1

FDCAN3_IT0 = 88

88 - FDCAN3_IT0

FDCAN3_IT1 = 89

89 - FDCAN3_IT1

RNG = 90

90 - RNG

LPUART1 = 91

91 - LPUART1

I2C3_EV = 92

92 - I2C3_EV

I2C3_ER = 93

93 - I2C3_ER

DMAMUX_OVR = 94

94 - DMAMUX_OVR

QUADSPI = 95

95 - QUADSPI

DMA1_CHANNEL8 = 96

96 - DMA1_CHANNEL8

DMA2_CHANNEL6 = 97

97 - DMA2_CHANNEL6

DMA2_CHANNEL7 = 98

98 - DMA2_CHANNEL7

DMA2_CHANNEL8 = 99

99 - DMA2_CHANNEL8

CORDIC = 100

100 - CORDIC

FMAC = 101

101 - FMAC

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralEq for Interrupt

impl StructuralPartialEq for Interrupt