Struct stm32_metapac::adccommon::regs::Ccr
#[repr(transparent)]pub struct Ccr(pub u32);
Expand description
common control register
Tuple Fields§
§0: u32
Implementations§
§impl Ccr
impl Ccr
pub const fn ckmode(&self) -> Ckmode
pub const fn ckmode(&self) -> Ckmode
ADC clock mode These bits are set and cleared by software to define the ADC clock scheme (which is common to both master and slave ADCs): In all synchronous clock modes, there is no jitter in the delay from a timer trigger to the start of a conversion. Note: The software is allowed to write these bits only when the ADCs are disabled (ADCAL = 0, JADSTART = 0, ADSTART = 0, ADSTP = 0, ADDIS = 0 and ADEN = 0).
pub fn set_ckmode(&mut self, val: Ckmode)
pub fn set_ckmode(&mut self, val: Ckmode)
ADC clock mode These bits are set and cleared by software to define the ADC clock scheme (which is common to both master and slave ADCs): In all synchronous clock modes, there is no jitter in the delay from a timer trigger to the start of a conversion. Note: The software is allowed to write these bits only when the ADCs are disabled (ADCAL = 0, JADSTART = 0, ADSTART = 0, ADSTP = 0, ADDIS = 0 and ADEN = 0).
pub const fn presc(&self) -> Presc
pub const fn presc(&self) -> Presc
ADC prescaler These bits are set and cleared by software to select the frequency of the clock to the ADC. The clock is common for all the ADCs. other: reserved Note: The software is allowed to write these bits only when the ADC is disabled (ADCAL = 0, JADSTART = 0, ADSTART = 0, ADSTP = 0, ADDIS = 0 and ADEN = 0). The ADC prescaler value is applied only when CKMODE[1:0] = 0b00.
pub fn set_presc(&mut self, val: Presc)
pub fn set_presc(&mut self, val: Presc)
ADC prescaler These bits are set and cleared by software to select the frequency of the clock to the ADC. The clock is common for all the ADCs. other: reserved Note: The software is allowed to write these bits only when the ADC is disabled (ADCAL = 0, JADSTART = 0, ADSTART = 0, ADSTP = 0, ADDIS = 0 and ADEN = 0). The ADC prescaler value is applied only when CKMODE[1:0] = 0b00.
pub const fn vrefen(&self) -> bool
pub const fn vrefen(&self) -> bool
VREFINT enable This bit is set and cleared by software to enable/disable the VREFINT channel
pub fn set_vrefen(&mut self, val: bool)
pub fn set_vrefen(&mut self, val: bool)
VREFINT enable This bit is set and cleared by software to enable/disable the VREFINT channel
pub const fn tsen(&self) -> bool
pub const fn tsen(&self) -> bool
VSENSE enable This bit is set and cleared by software to control VSENSE
pub fn set_tsen(&mut self, val: bool)
pub fn set_tsen(&mut self, val: bool)
VSENSE enable This bit is set and cleared by software to control VSENSE
pub fn set_vbaten(&mut self, val: bool)
pub fn set_vbaten(&mut self, val: bool)
VBAT enable This bit is set and cleared by software to control