Struct stm32_metapac::comp::regs::Cfgr1

#[repr(transparent)]
pub struct Cfgr1(pub u32);

Expand description

Comparator configuration register 1.

Tuple Fields§

§0: u32

Implementations§

§

impl Cfgr1

pub const fn en(&self) -> bool

COMP Channel1 enable This bit is set and cleared by software (only if LOCK not set). It enables the COMP-Channel1.

pub fn set_en(&mut self, val: bool)

COMP Channel1 enable This bit is set and cleared by software (only if LOCK not set). It enables the COMP-Channel1.

pub const fn brgen(&self) -> bool

Scaler bridge enable This bit is set and cleared by software (only if LOCK not set). This bit enables the bridge of the scaler. If SCALEN is set and BRGEN is reset, all four scaler outputs provide the same level V_{REF_COMP} (similar to V_REFINT). If SCALEN and BRGEN are set, the four scaler outputs provide V_{REF_COMP}, 3/4-V_{REF_COMP}, 1/2-V_{REF_COMP} and 1/4-V_{REF_COMP} levels, respectively.

pub fn set_brgen(&mut self, val: bool)

Scaler bridge enable This bit is set and cleared by software (only if LOCK not set). This bit enables the bridge of the scaler. If SCALEN is set and BRGEN is reset, all four scaler outputs provide the same level V_{REF_COMP} (similar to V_REFINT). If SCALEN and BRGEN are set, the four scaler outputs provide V_{REF_COMP}, 3/4-V_{REF_COMP}, 1/2-V_{REF_COMP} and 1/4-V_{REF_COMP} levels, respectively.

pub const fn scalen(&self) -> bool

Voltage scaler enable This bit is set and cleared by software (only if LOCK not set). This bit enables the V_REFINT scaler for the COMP channels.

pub fn set_scalen(&mut self, val: bool)

Voltage scaler enable This bit is set and cleared by software (only if LOCK not set). This bit enables the V_REFINT scaler for the COMP channels.

pub const fn polarity(&self) -> bool

COMP channel1 polarity selection This bit is set and cleared by software (only if LOCK not set). It inverts COMP channel1 polarity.

pub fn set_polarity(&mut self, val: bool)

COMP channel1 polarity selection This bit is set and cleared by software (only if LOCK not set). It inverts COMP channel1 polarity.

pub const fn iten(&self) -> bool

COMP channel1 interrupt enable This bit is set and cleared by software (only if LOCK not set). This bit enable the interrupt generation of the COMP channel1.

pub fn set_iten(&mut self, val: bool)

COMP channel1 interrupt enable This bit is set and cleared by software (only if LOCK not set). This bit enable the interrupt generation of the COMP channel1.

pub const fn hyst(&self) -> Hyst

COMP channel1 hysteresis selection These bits are set and cleared by software (only if LOCK not set). They select the hysteresis voltage of the COMP channel1.

pub fn set_hyst(&mut self, val: Hyst)

COMP channel1 hysteresis selection These bits are set and cleared by software (only if LOCK not set). They select the hysteresis voltage of the COMP channel1.

pub const fn pwrmode(&self) -> Pwrmode

Power mode of the COMP channel1 These bits are set and cleared by software (only if LOCK not set). They control the power/speed of the COMP channel1.

pub fn set_pwrmode(&mut self, val: Pwrmode)

Power mode of the COMP channel1 These bits are set and cleared by software (only if LOCK not set). They control the power/speed of the COMP channel1.

pub const fn inmsel(&self) -> Inmsel

COMP channel1 inverting input selection These bits are set and cleared by software (only if LOCK not set). They select which input is connected to the input minus of the COMP channel. Note: See Table-146: COMP1 inverting input assignment for more details.

pub fn set_inmsel(&mut self, val: Inmsel)

COMP channel1 inverting input selection These bits are set and cleared by software (only if LOCK not set). They select which input is connected to the input minus of the COMP channel. Note: See Table-146: COMP1 inverting input assignment for more details.

pub const fn inpsel1(&self) -> bool

COMP noninverting input selection This bit is set and cleared by software (only if LOCK not set). They select which input is connected to the positive input of COMP channel. Note: See Table-145: COMP1 noninverting input assignment for more details.

pub fn set_inpsel1(&mut self, val: bool)

COMP noninverting input selection This bit is set and cleared by software (only if LOCK not set). They select which input is connected to the positive input of COMP channel. Note: See Table-145: COMP1 noninverting input assignment for more details.

pub const fn inpsel2(&self) -> bool

COMP noninverting input selection This bit is set and cleared by software (only if LOCK not set). They select which input is connected to the positive input of the COMP channel. See Table-145: COMP1 noninverting input assignment for more details.

pub fn set_inpsel2(&mut self, val: bool)

COMP noninverting input selection This bit is set and cleared by software (only if LOCK not set). They select which input is connected to the positive input of the COMP channel. See Table-145: COMP1 noninverting input assignment for more details.

pub const fn blanking(&self) -> Blanking

COMP Channel1 blanking source selection Bits of this field are set and cleared by software (only if LOCK not set). The field selects the input source for COMP Channel1 output blanking: All other values: reserved.

pub fn set_blanking(&mut self, val: Blanking)

COMP Channel1 blanking source selection Bits of this field are set and cleared by software (only if LOCK not set). The field selects the input source for COMP Channel1 output blanking: All other values: reserved.

pub const fn lock(&self) -> bool

Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR1[31:0].

pub fn set_lock(&mut self, val: bool)

Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR1[31:0].