Struct stm32_metapac::i3c::regs::CrAlternate
#[repr(transparent)]pub struct CrAlternate(pub u32);
Expand description
I3C message control register alternate.
Tuple Fields§
§0: u32
Implementations§
§impl CrAlternate
impl CrAlternate
pub const fn dcnt(&self) -> u16
pub const fn dcnt(&self) -> u16
count of data to transfer during a read or write message, in bytes (when I3C is acting as controller) Linear encoding up to 64 Kbytes -1. …
pub fn set_dcnt(&mut self, val: u16)
pub fn set_dcnt(&mut self, val: u16)
count of data to transfer during a read or write message, in bytes (when I3C is acting as controller) Linear encoding up to 64 Kbytes -1. …
pub const fn ccc(&self) -> u8
pub const fn ccc(&self) -> u8
8-bit CCC code (when I3C is acting as controller) If Bit[23]=CCC[7]=1, this is the 1st part of an I3C SDR direct CCC command. If Bit[23]=CCC[7]=0, this is an I3C SDR broadcast CCC command (including ENTDAA and ENTHDR0).
pub fn set_ccc(&mut self, val: u8)
pub fn set_ccc(&mut self, val: u8)
8-bit CCC code (when I3C is acting as controller) If Bit[23]=CCC[7]=1, this is the 1st part of an I3C SDR direct CCC command. If Bit[23]=CCC[7]=0, this is an I3C SDR broadcast CCC command (including ENTDAA and ENTHDR0).
pub const fn mtype(&self) -> u8
pub const fn mtype(&self) -> u8
message type (when I3C is acting as controller) Bits[23:16] (CCC[7:0]) is the emitted 8-bit CCC code If Bit[23]=CCC[7]=1: this is the 1st part of an I3C SDR direct CCC command The transferred direct CCC command message is: {S / S+7’h7E +RnW=0 / Sr+} + (direct CCC + T) + (8-bit Data + T) + Sr After a S (START), depending on I3C_CFGR.NOARBH, the arbitrable header (7’h7E+RnW=0) is inserted or not. Sr+: after a Sr (Repeated Start), the hardware automatically inserts (7’h7E+R/W). If Bit[23]=CCC[7]=0: this is an I3C SDR broadcast CCC command (including ENTDAA and ENTHDR0) The transferred broadcast CCC command message is: {S / S+7’h7E +RnW=0 / Sr+} + (broadcast CCC + T) + (8-bit Data + T)* + Sr/P After a S (START), depending on I3C_CFGR.NOARBH, the arbitrable header (7’h7E+RnW=0) is inserted or not. Sr+*: after a Sr (Repeated Start), the hardware automatically inserts (7’h7E+R/W). others: reserved.
pub fn set_mtype(&mut self, val: u8)
pub fn set_mtype(&mut self, val: u8)
message type (when I3C is acting as controller) Bits[23:16] (CCC[7:0]) is the emitted 8-bit CCC code If Bit[23]=CCC[7]=1: this is the 1st part of an I3C SDR direct CCC command The transferred direct CCC command message is: {S / S+7’h7E +RnW=0 / Sr+} + (direct CCC + T) + (8-bit Data + T) + Sr After a S (START), depending on I3C_CFGR.NOARBH, the arbitrable header (7’h7E+RnW=0) is inserted or not. Sr+: after a Sr (Repeated Start), the hardware automatically inserts (7’h7E+R/W). If Bit[23]=CCC[7]=0: this is an I3C SDR broadcast CCC command (including ENTDAA and ENTHDR0) The transferred broadcast CCC command message is: {S / S+7’h7E +RnW=0 / Sr+} + (broadcast CCC + T) + (8-bit Data + T)* + Sr/P After a S (START), depending on I3C_CFGR.NOARBH, the arbitrable header (7’h7E+RnW=0) is inserted or not. Sr+*: after a Sr (Repeated Start), the hardware automatically inserts (7’h7E+R/W). others: reserved.
Trait Implementations§
§impl Clone for CrAlternate
impl Clone for CrAlternate
§fn clone(&self) -> CrAlternate
fn clone(&self) -> CrAlternate
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read more§impl Default for CrAlternate
impl Default for CrAlternate
§fn default() -> CrAlternate
fn default() -> CrAlternate
§impl PartialEq for CrAlternate
impl PartialEq for CrAlternate
§fn eq(&self, other: &CrAlternate) -> bool
fn eq(&self, other: &CrAlternate) -> bool
self
and other
values to be equal, and is used
by ==
.