Struct stm32_metapac::pwr::regs::Wucr
#[repr(transparent)]pub struct Wucr(pub u32);
Expand description
PWR wakeup configuration register.
Tuple Fields§
§0: u32
Implementations§
§impl Wucr
impl Wucr
pub const fn wupen(&self, n: usize) -> bool
pub const fn wupen(&self, n: usize) -> bool
enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.
pub fn set_wupen(&mut self, n: usize, val: bool)
pub fn set_wupen(&mut self, n: usize, val: bool)
enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.
pub const fn wupp(&self, n: usize) -> Wupp
pub const fn wupp(&self, n: usize) -> Wupp
wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
pub fn set_wupp(&mut self, n: usize, val: Wupp)
pub fn set_wupp(&mut self, n: usize, val: Wupp)
wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
pub const fn wuppupd(&self, n: usize) -> Wuppupd
pub const fn wuppupd(&self, n: usize) -> Wuppupd
wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
pub fn set_wuppupd(&mut self, n: usize, val: Wuppupd)
pub fn set_wuppupd(&mut self, n: usize, val: Wuppupd)
wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.