Struct M2cr
#[repr(transparent)]pub struct M2cr(pub u32);Expand description
RAMCFG memory 2 control register.
Tuple Fields§
§0: u32Implementations§
§impl M2cr
impl M2cr
pub const fn ecce(&self) -> bool
pub const fn ecce(&self) -> bool
ECC enable. This bit reset value is defined by the user option bit configuration. When set, it can be cleared by software only after writing the unlock sequence in the MxECCKEYR register. Note: This bit is reserved and must be kept at reset value in SRAM1 control register.
pub fn set_ecce(&mut self, val: bool)
pub fn set_ecce(&mut self, val: bool)
ECC enable. This bit reset value is defined by the user option bit configuration. When set, it can be cleared by software only after writing the unlock sequence in the MxECCKEYR register. Note: This bit is reserved and must be kept at reset value in SRAM1 control register.
pub const fn ale(&self) -> bool
pub const fn ale(&self) -> bool
Address latch enable Note: This bit is reserved and must be kept at reset value in SRAM1 control register.
pub fn set_ale(&mut self, val: bool)
pub fn set_ale(&mut self, val: bool)
Address latch enable Note: This bit is reserved and must be kept at reset value in SRAM1 control register.
pub const fn sramer(&self) -> bool
pub const fn sramer(&self) -> bool
SRAM erase This bit can be set by software only after writing the unlock sequence in the ERASEKEY field of the MxERKEYR register. Setting this bit starts the SRAM erase. This bit is automatically cleared by hardware at the end of the erase operation.
pub fn set_sramer(&mut self, val: bool)
pub fn set_sramer(&mut self, val: bool)
SRAM erase This bit can be set by software only after writing the unlock sequence in the ERASEKEY field of the MxERKEYR register. Setting this bit starts the SRAM erase. This bit is automatically cleared by hardware at the end of the erase operation.