Struct stm32_metapac::adc::regs::Sqr1
#[repr(transparent)]pub struct Sqr1(pub u32);
Expand description
regular sequence register 1
Tuple Fields§
§0: u32
Implementations§
§impl Sqr1
impl Sqr1
pub const fn l(&self) -> u8
pub const fn l(&self) -> u8
Regular channel sequence length These bits are written by software to define the total number of conversions in the regular channel conversion sequence. … Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).
pub fn set_l(&mut self, val: u8)
pub fn set_l(&mut self, val: u8)
Regular channel sequence length These bits are written by software to define the total number of conversions in the regular channel conversion sequence. … Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).
pub const fn sq(&self, n: usize) -> u8
pub const fn sq(&self, n: usize) -> u8
1st-4th conversions in regular sequence These bits are written by software with the channel number (0 to 19) assigned as the 1st-4th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).
pub fn set_sq(&mut self, n: usize, val: u8)
pub fn set_sq(&mut self, n: usize, val: u8)
1st-4th conversions in regular sequence These bits are written by software with the channel number (0 to 19) assigned as the 1st-4th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).