Struct stm32_metapac::fmc::regs::Pmem

#[repr(transparent)]
pub struct Pmem(pub u32);

Common memory space timing register.

Tuple Fields

0: u32

Implementations

impl Pmem

pub const fn memset(&self) -> u8

Common memory x setup time Defines the number of HCLK (+1) clock cycles to set up the address before the command assertion (NWE, NOE), for NAND Flash read or write access to common memory space on socket x:.

pub fn set_memset(&mut self, val: u8)

Common memory x setup time Defines the number of HCLK (+1) clock cycles to set up the address before the command assertion (NWE, NOE), for NAND Flash read or write access to common memory space on socket x:.

pub const fn memwait(&self) -> u8

Common memory wait time Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to common memory space on socket. The duration of command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of HCLK:.

pub fn set_memwait(&mut self, val: u8)

Common memory wait time Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to common memory space on socket. The duration of command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of HCLK:.

pub const fn memhold(&self) -> u8

Common memory hold time Defines the number of HCLK clock cycles for write access and HCLK (+2) clock cycles for read access during which the address is held (and data for write accesses) after the command is deasserted (NWE, NOE), for NAND Flash read or write access to common memory space on socket x:.

pub fn set_memhold(&mut self, val: u8)

Common memory hold time Defines the number of HCLK clock cycles for write access and HCLK (+2) clock cycles for read access during which the address is held (and data for write accesses) after the command is deasserted (NWE, NOE), for NAND Flash read or write access to common memory space on socket x:.

pub const fn memhiz(&self) -> u8

Common memory x data bus Hi-Z time Defines the number of HCLK clock cycles during which the data bus is kept Hi-Z after the start of a NAND Flash write access to common memory space on socket. This is only valid for write transactions:.

pub fn set_memhiz(&mut self, val: u8)

Common memory x data bus Hi-Z time Defines the number of HCLK clock cycles during which the data bus is kept Hi-Z after the start of a NAND Flash write access to common memory space on socket. This is only valid for write transactions:.

Trait Implementations

impl Clone for Pmem

fn clone(&self) -> Pmem

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Pmem

fn default() -> Pmem

Returns the “default value” for a type.

impl PartialEq for Pmem

fn eq(&self, other: &Pmem) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Pmem

impl Eq for Pmem

impl StructuralEq for Pmem

impl StructuralPartialEq for Pmem