Struct Cr
#[repr(transparent)]pub struct Cr(pub u32);Expand description
This register is used to control the concerned channel.
Tuple Fields§
§0: u32Implementations§
§impl Cr
impl Cr
pub const fn teie(&self) -> bool
pub const fn teie(&self) -> bool
Transfer error interrupt enable This bit is set and cleared by software.
pub fn set_teie(&mut self, val: bool)
pub fn set_teie(&mut self, val: bool)
Transfer error interrupt enable This bit is set and cleared by software.
pub const fn ctcie(&self) -> bool
pub const fn ctcie(&self) -> bool
Channel Transfer Complete interrupt enable This bit is set and cleared by software.
pub fn set_ctcie(&mut self, val: bool)
pub fn set_ctcie(&mut self, val: bool)
Channel Transfer Complete interrupt enable This bit is set and cleared by software.
pub const fn brtie(&self) -> bool
pub const fn brtie(&self) -> bool
Block Repeat transfer interrupt enable This bit is set and cleared by software.
pub fn set_brtie(&mut self, val: bool)
pub fn set_brtie(&mut self, val: bool)
Block Repeat transfer interrupt enable This bit is set and cleared by software.
pub const fn btie(&self) -> bool
pub const fn btie(&self) -> bool
Block Transfer interrupt enable This bit is set and cleared by software.
pub fn set_btie(&mut self, val: bool)
pub fn set_btie(&mut self, val: bool)
Block Transfer interrupt enable This bit is set and cleared by software.
pub const fn tcie(&self) -> bool
pub const fn tcie(&self) -> bool
buffer Transfer Complete interrupt enable This bit is set and cleared by software.
pub fn set_tcie(&mut self, val: bool)
pub fn set_tcie(&mut self, val: bool)
buffer Transfer Complete interrupt enable This bit is set and cleared by software.
pub const fn pl(&self) -> Pl
pub const fn pl(&self) -> Pl
Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0.
pub fn set_pl(&mut self, val: Pl)
pub fn set_pl(&mut self, val: Pl)
Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0.
pub const fn swrq(&self) -> bool
pub const fn swrq(&self) -> bool
SW ReQuest Writing a 1 into this bit sets the CRQAx in MDMA_ISRy register, activating the request on Channel x Note: Either the whole CxCR register or the 8-bit/16-bit register @ Address offset: 0x4E + 0x40 chn may be used for SWRQ activation. In case of a SW request, acknowledge is not generated (neither HW signal, nor CxMAR write access).
pub fn set_swrq(&mut self, val: bool)
pub fn set_swrq(&mut self, val: bool)
SW ReQuest Writing a 1 into this bit sets the CRQAx in MDMA_ISRy register, activating the request on Channel x Note: Either the whole CxCR register or the 8-bit/16-bit register @ Address offset: 0x4E + 0x40 chn may be used for SWRQ activation. In case of a SW request, acknowledge is not generated (neither HW signal, nor CxMAR write access).