Struct stm32_metapac::sdmmc::regs::Dctrl

#[repr(transparent)]
pub struct Dctrl(pub u32);

Expand description

The SDMMC_DCTRL register control the data path state machine (DPSM).

Tuple Fields§

§0: u32

Implementations§

§

impl Dctrl

pub const fn dten(&self) -> bool

Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.

pub fn set_dten(&mut self, val: bool)

Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.

pub const fn dtdir(&self) -> bool

Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn set_dtdir(&mut self, val: bool)

Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub const fn dtmode(&self) -> u8

Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn set_dtmode(&mut self, val: u8)

Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub const fn dblocksize(&self) -> u8

Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)

pub fn set_dblocksize(&mut self, val: u8)

Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)

pub const fn rwstart(&self) -> bool

Read wait start. If this bit is set, read wait operation starts.

pub fn set_rwstart(&mut self, val: bool)

Read wait start. If this bit is set, read wait operation starts.

pub const fn rwstop(&self) -> bool

Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.

pub fn set_rwstop(&mut self, val: bool)

Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.

pub const fn rwmod(&self) -> bool

Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn set_rwmod(&mut self, val: bool)

Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub const fn sdioen(&self) -> bool

SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.

pub fn set_sdioen(&mut self, val: bool)

SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.

pub const fn bootacken(&self) -> bool

Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn set_bootacken(&mut self, val: bool)

Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub const fn fiforst(&self) -> bool

FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.

pub fn set_fiforst(&mut self, val: bool)

FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.