Struct stm32_metapac::rcc::regs::Pllsscgr
#[repr(transparent)]pub struct Pllsscgr(pub u32);
Expand description
RCC PLL1 Spread Spectrum Clock Generator register.
Tuple Fields§
§0: u32
Implementations§
§impl Pllsscgr
impl Pllsscgr
pub const fn mod_per(&self) -> u16
pub const fn mod_per(&self) -> u16
Modulation Period Adjustment for PLL1 Set and reset by software to adjust the modulation period of the clock spreading generator.
pub fn set_mod_per(&mut self, val: u16)
pub fn set_mod_per(&mut self, val: u16)
Modulation Period Adjustment for PLL1 Set and reset by software to adjust the modulation period of the clock spreading generator.
pub const fn tpdfn_dis1(&self) -> bool
pub const fn tpdfn_dis1(&self) -> bool
Dithering TPDF noise control for PLL1 Set and reset by software. This bit is used to enable or disable the injection of a dithering noise into the SSCG modulator. This dithering noise is generated using a triangular probability density function.
pub fn set_tpdfn_dis1(&mut self, val: bool)
pub fn set_tpdfn_dis1(&mut self, val: bool)
Dithering TPDF noise control for PLL1 Set and reset by software. This bit is used to enable or disable the injection of a dithering noise into the SSCG modulator. This dithering noise is generated using a triangular probability density function.
pub const fn rpdfn_dis1(&self) -> bool
pub const fn rpdfn_dis1(&self) -> bool
Dithering RPDF noise control for PLL1 Set and reset by software. This bit is used to enable or disable the injection of a dithering noise into the SSCG modulator. This dithering noise is generated using a rectangular probability density function.
pub fn set_rpdfn_dis1(&mut self, val: bool)
pub fn set_rpdfn_dis1(&mut self, val: bool)
Dithering RPDF noise control for PLL1 Set and reset by software. This bit is used to enable or disable the injection of a dithering noise into the SSCG modulator. This dithering noise is generated using a rectangular probability density function.
pub const fn dwnspread1(&self) -> Dwnspread
pub const fn dwnspread1(&self) -> Dwnspread
Spread spectrum clock generator mode for PLL1 Set and reset by software to select the clock spreading mode.
pub fn set_dwnspread1(&mut self, val: Dwnspread)
pub fn set_dwnspread1(&mut self, val: Dwnspread)
Spread spectrum clock generator mode for PLL1 Set and reset by software to select the clock spreading mode.
pub const fn inc_step(&self) -> u16
pub const fn inc_step(&self) -> u16
Modulation Depth Adjustment for PLL1 Set and reset by software to adjust the modulation depth of the clock spreading generator.
pub fn set_inc_step(&mut self, val: u16)
pub fn set_inc_step(&mut self, val: u16)
Modulation Depth Adjustment for PLL1 Set and reset by software to adjust the modulation depth of the clock spreading generator.
Trait Implementations§
impl Copy for Pllsscgr
impl Eq for Pllsscgr
impl StructuralPartialEq for Pllsscgr
Auto Trait Implementations§
impl Freeze for Pllsscgr
impl RefUnwindSafe for Pllsscgr
impl Send for Pllsscgr
impl Sync for Pllsscgr
impl Unpin for Pllsscgr
impl UnwindSafe for Pllsscgr
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)