Struct stm32_metapac::gpdma::regs::ChLlr

#[repr(transparent)]
pub struct ChLlr(pub u32);

Expand description

GPDMA channel 15 alternate linked-list address register

Tuple Fields§

§0: u32

Implementations§

§

impl ChLlr

pub const fn la(&self) -> u16

pointer (16-bit low-significant address) to the next linked-list data structure. If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0, the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file. Else, this field is the pointer to the memory address offset from which the next linked-list data structure is automatically fetched from, once the data transfer is completed, in order to conditionally update the linked-list GPDMA internal register file (CH[x].CTR1, CH[x].TR2, CH[x].BR1, CH[x].SAR, CH[x].DAR and CH[x].LLR). Note: The user must program the pointer to be 32-bit aligned. The two low-significant bits are write ignored.

pub fn set_la(&mut self, val: u16)

pointer (16-bit low-significant address) to the next linked-list data structure. If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0, the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file. Else, this field is the pointer to the memory address offset from which the next linked-list data structure is automatically fetched from, once the data transfer is completed, in order to conditionally update the linked-list GPDMA internal register file (CH[x].CTR1, CH[x].TR2, CH[x].BR1, CH[x].SAR, CH[x].DAR and CH[x].LLR). Note: The user must program the pointer to be 32-bit aligned. The two low-significant bits are write ignored.

pub const fn ull(&self) -> bool

Update CH[x].LLR register from memory. This bit is used to control the update of CH[x].LLR from the memory during the link transfer.

pub fn set_ull(&mut self, val: bool)

Update CH[x].LLR register from memory. This bit is used to control the update of CH[x].LLR from the memory during the link transfer.

pub const fn ub2(&self) -> bool

Update CH[x].BR2 from memory. This bit controls the update of CH[x].BR2 from the memory during the link transfer.

pub fn set_ub2(&mut self, val: bool)

Update CH[x].BR2 from memory. This bit controls the update of CH[x].BR2 from the memory during the link transfer.

pub const fn ut3(&self) -> bool

Update CH[x].TR3 from memory. This bit controls the update of CH[x].TR3 from the memory during the link transfer.

pub fn set_ut3(&mut self, val: bool)

Update CH[x].TR3 from memory. This bit controls the update of CH[x].TR3 from the memory during the link transfer.

pub const fn uda(&self) -> bool

Update CH[x].DAR register from memory. This bit is used to control the update of CH[x].DAR from the memory during the link transfer.

pub fn set_uda(&mut self, val: bool)

Update CH[x].DAR register from memory. This bit is used to control the update of CH[x].DAR from the memory during the link transfer.

pub const fn usa(&self) -> bool

update CH[x].SAR from memory. This bit controls the update of CH[x].SAR from the memory during the link transfer.

pub fn set_usa(&mut self, val: bool)

update CH[x].SAR from memory. This bit controls the update of CH[x].SAR from the memory during the link transfer.

pub const fn ub1(&self) -> bool

Update CH[x].BR1 from memory. This bit controls the update of CH[x].BR1 from the memory during the link transfer. If UB1 = 0 and if CH[x].LLR ≠ 0, the linked-list is not completed. CH[x].BR1.BNDT[15:0] is then restored to the programmed value after data transfer is completed and before the link transfer.

pub fn set_ub1(&mut self, val: bool)

Update CH[x].BR1 from memory. This bit controls the update of CH[x].BR1 from the memory during the link transfer. If UB1 = 0 and if CH[x].LLR ≠ 0, the linked-list is not completed. CH[x].BR1.BNDT[15:0] is then restored to the programmed value after data transfer is completed and before the link transfer.