Struct stm32_metapac::pwr::regs::Cr1
#[repr(transparent)]pub struct Cr1(pub u32);Expand description
PWR control register 1.
Tuple Fields§
§0: u32Implementations§
§impl Cr1
impl Cr1
pub const fn pls(&self) -> Pls
pub const fn pls(&self) -> Pls
Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details.
pub fn set_pls(&mut self, val: Pls)
pub fn set_pls(&mut self, val: Pls)
Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details.
pub const fn dbp(&self) -> bool
pub const fn dbp(&self) -> bool
Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in the PWR_CSR1 register, are protected against parasitic write access. This bit must be set to enable write access to these registers.
pub fn set_dbp(&mut self, val: bool)
pub fn set_dbp(&mut self, val: bool)
Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in the PWR_CSR1 register, are protected against parasitic write access. This bit must be set to enable write access to these registers.
pub const fn flps(&self) -> bool
pub const fn flps(&self) -> bool
Flash low-power mode in Stop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from Stop mode. When it is set, the Flash memory enters low-power mode when device is in Stop mode. consumption).
pub fn set_flps(&mut self, val: bool)
pub fn set_flps(&mut self, val: bool)
Flash low-power mode in Stop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from Stop mode. When it is set, the Flash memory enters low-power mode when device is in Stop mode. consumption).
pub const fn rlpsn(&self) -> Rlpsn
pub const fn rlpsn(&self) -> Rlpsn
RAM low power mode disable in STOP. When set the RAMs will not enter to low power mode when the system enters to STOP.
pub fn set_rlpsn(&mut self, val: Rlpsn)
pub fn set_rlpsn(&mut self, val: Rlpsn)
RAM low power mode disable in STOP. When set the RAMs will not enter to low power mode when the system enters to STOP.
pub const fn booste(&self) -> bool
pub const fn booste(&self) -> bool
analog switch VBoost control This bit enables the booster to guarantee the analog switch AC performance when the VDD supply voltage is below 2.7 V (reduction of the total harmonic distortion to have the same switch performance over the full supply voltage range) The VDD supply voltage can be monitored through the PVD and the PLS bits.
pub fn set_booste(&mut self, val: bool)
pub fn set_booste(&mut self, val: bool)
analog switch VBoost control This bit enables the booster to guarantee the analog switch AC performance when the VDD supply voltage is below 2.7 V (reduction of the total harmonic distortion to have the same switch performance over the full supply voltage range) The VDD supply voltage can be monitored through the PVD and the PLS bits.
pub const fn avdready(&self) -> bool
pub const fn avdready(&self) -> bool
analog voltage ready This bit is only used when the analog switch boost needs to be enabled (see BOOSTE bit). It must be set by software when the expected VDDA analog supply level is available. The correct analog supply level is indicated by the AVDO bit (PWR_CSR1 register) after setting the AVDEN bit and selecting the supply level to be monitored (ALS bits).
pub fn set_avdready(&mut self, val: bool)
pub fn set_avdready(&mut self, val: bool)
analog voltage ready This bit is only used when the analog switch boost needs to be enabled (see BOOSTE bit). It must be set by software when the expected VDDA analog supply level is available. The correct analog supply level is indicated by the AVDO bit (PWR_CSR1 register) after setting the AVDEN bit and selecting the supply level to be monitored (ALS bits).