Struct stm32_metapac::rcc::regs::Ahb1enr
#[repr(transparent)]pub struct Ahb1enr(pub u32);
Expand description
RCC AHB1 clock enable register.
Tuple Fieldsยง
ยง0: u32
Implementationsยง
ยงimpl Ahb1enr
impl Ahb1enr
pub fn set_gpdma1en(&mut self, val: bool)
pub fn set_gpdma1en(&mut self, val: bool)
GPDMA1 clock enable Set and reset by software.
pub const fn adc12en(&self) -> bool
pub const fn adc12en(&self) -> bool
ADC1 and 2 peripheral clocks enable Set and reset by software. The peripheral clocks of the ADC1 and 2 are the kernel clock selected by ADCSEL and provided to ADCx_CK input, and the hclk1 bus interface clock.
pub fn set_adc12en(&mut self, val: bool)
pub fn set_adc12en(&mut self, val: bool)
ADC1 and 2 peripheral clocks enable Set and reset by software. The peripheral clocks of the ADC1 and 2 are the kernel clock selected by ADCSEL and provided to ADCx_CK input, and the hclk1 bus interface clock.
pub fn set_ethtxen(&mut self, val: bool)
pub fn set_ethtxen(&mut self, val: bool)
ETH1 transmission clock enable Set and reset by software.
pub fn set_ethrxen(&mut self, val: bool)
pub fn set_ethrxen(&mut self, val: bool)
ETH1 reception clock enable Set and reset by software.
pub const fn usb_otg_hsen(&self) -> bool
pub const fn usb_otg_hsen(&self) -> bool
OTGHS clocks enable Set and reset by software.
pub fn set_usb_otg_hsen(&mut self, val: bool)
pub fn set_usb_otg_hsen(&mut self, val: bool)
OTGHS clocks enable Set and reset by software.
pub fn set_usbphycen(&mut self, val: bool)
pub fn set_usbphycen(&mut self, val: bool)
USBPHYC clocks enable Set and reset by software.
pub const fn usb_otg_fsen(&self) -> bool
pub const fn usb_otg_fsen(&self) -> bool
OTGFS peripheral clocks enable Set and reset by software.
pub fn set_usb_otg_fsen(&mut self, val: bool)
pub fn set_usb_otg_fsen(&mut self, val: bool)
OTGFS peripheral clocks enable Set and reset by software.