Struct stm32_metapac::rcc::regs::Ahb5enr

#[repr(transparent)]
pub struct Ahb5enr(pub u32);

RCC AHB5 clock enable register.

Tuple Fields

0: u32

Implementations

impl Ahb5enr

pub const fn hpdma1en(&self) -> bool

HPDMA1 peripheral clock enable Set and reset by software.

pub fn set_hpdma1en(&mut self, val: bool)

HPDMA1 peripheral clock enable Set and reset by software.

pub const fn dma2den(&self) -> bool

DMA2D peripheral clock enable Set and reset by software.

pub fn set_dma2den(&mut self, val: bool)

DMA2D peripheral clock enable Set and reset by software.

pub const fn jpegen(&self) -> bool

JPEG peripheral clock enable Set and reset by software.

pub fn set_jpegen(&mut self, val: bool)

JPEG peripheral clock enable Set and reset by software.

pub const fn fmcen(&self) -> bool

FMC and MCE3 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if FMCCKP = 1. The peripheral clocks of the FMC are the kernel clock selected by FMCSEL, and the hclk5 bus interface clock.

pub fn set_fmcen(&mut self, val: bool)

FMC and MCE3 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if FMCCKP = 1. The peripheral clocks of the FMC are the kernel clock selected by FMCSEL, and the hclk5 bus interface clock.

pub const fn xspi1en(&self) -> bool

XSPI1 and MCE1 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if XSPICKP = 1.

pub fn set_xspi1en(&mut self, val: bool)

XSPI1 and MCE1 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if XSPICKP = 1.

pub const fn sdmmc1en(&self) -> bool

SDMMC1 and DB_SDMMC1 peripheral clocks enable Set and reset by software.

pub fn set_sdmmc1en(&mut self, val: bool)

SDMMC1 and DB_SDMMC1 peripheral clocks enable Set and reset by software.

pub const fn xspi2en(&self) -> bool

XSPI2 and MCE2 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if XSPICKP = 1.

pub fn set_xspi2en(&mut self, val: bool)

XSPI2 and MCE2 peripheral clocks enable Set and reset by software. The hardware prevents writing this bit if XSPICKP = 1.

pub const fn iomngren(&self) -> bool

XSPIM peripheral clock enable Set and reset by software.

pub fn set_iomngren(&mut self, val: bool)

XSPIM peripheral clock enable Set and reset by software.

pub const fn gfxmmuen(&self) -> bool

GFXMMU peripheral clock enable Set and reset by software.

pub fn set_gfxmmuen(&mut self, val: bool)

GFXMMU peripheral clock enable Set and reset by software.

pub const fn gpuen(&self) -> bool

GPU peripheral clock enable Set and reset by software.

pub fn set_gpuen(&mut self, val: bool)

GPU peripheral clock enable Set and reset by software.

Trait Implementations

impl Clone for Ahb5enr

fn clone(&self) -> Ahb5enr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Ahb5enr

fn default() -> Ahb5enr

Returns the “default value” for a type.

impl PartialEq for Ahb5enr

fn eq(&self, other: &Ahb5enr) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ahb5enr

impl Eq for Ahb5enr

impl StructuralEq for Ahb5enr

impl StructuralPartialEq for Ahb5enr