Struct stm32_metapac::lptim::regs::Cfgr
#[repr(transparent)]pub struct Cfgr(pub u32);
Expand description
LPTIM configuration register.
Tuple Fields§
§0: u32
Implementations§
§impl Cfgr
impl Cfgr
pub const fn cksel(&self) -> ClockSource
pub const fn cksel(&self) -> ClockSource
Clock selector The CKSEL bit selects which clock source the LPTIM uses:.
pub fn set_cksel(&mut self, val: ClockSource)
pub fn set_cksel(&mut self, val: ClockSource)
Clock selector The CKSEL bit selects which clock source the LPTIM uses:.
pub const fn ckpol(&self) -> Ckpol
pub const fn ckpol(&self) -> Ckpol
Clock Polarity When the LPTIM is clocked by an external clock source, CKPOL bits is used to configure the active edge or edges used by the counter: If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 1 is active. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 2 is active. Refer to for more details about Encoder mode sub-modes.
pub fn set_ckpol(&mut self, val: Ckpol)
pub fn set_ckpol(&mut self, val: Ckpol)
Clock Polarity When the LPTIM is clocked by an external clock source, CKPOL bits is used to configure the active edge or edges used by the counter: If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 1 is active. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 2 is active. Refer to for more details about Encoder mode sub-modes.
pub const fn ckflt(&self) -> Filter
pub const fn ckflt(&self) -> Filter
Configurable digital filter for external clock The CKFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an external clock signal before it is considered as a valid level transition. An internal clock source must be present to use this feature.
pub fn set_ckflt(&mut self, val: Filter)
pub fn set_ckflt(&mut self, val: Filter)
Configurable digital filter for external clock The CKFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an external clock signal before it is considered as a valid level transition. An internal clock source must be present to use this feature.
pub const fn trgflt(&self) -> Filter
pub const fn trgflt(&self) -> Filter
Configurable digital filter for trigger The TRGFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an internal trigger before it is considered as a valid level transition. An internal clock source must be present to use this feature.
pub fn set_trgflt(&mut self, val: Filter)
pub fn set_trgflt(&mut self, val: Filter)
Configurable digital filter for trigger The TRGFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an internal trigger before it is considered as a valid level transition. An internal clock source must be present to use this feature.
pub const fn presc(&self) -> Presc
pub const fn presc(&self) -> Presc
Clock prescaler The PRESC bits configure the prescaler division factor. It can be one among the following division factors:.
pub fn set_presc(&mut self, val: Presc)
pub fn set_presc(&mut self, val: Presc)
Clock prescaler The PRESC bits configure the prescaler division factor. It can be one among the following division factors:.
pub const fn trigsel(&self) -> u8
pub const fn trigsel(&self) -> u8
Trigger selector The TRIGSEL bits select the trigger source that serves as a trigger event for the LPTIM among the below 8 available sources: See for details.
pub fn set_trigsel(&mut self, val: u8)
pub fn set_trigsel(&mut self, val: u8)
Trigger selector The TRIGSEL bits select the trigger source that serves as a trigger event for the LPTIM among the below 8 available sources: See for details.
pub const fn trigen(&self) -> Trigen
pub const fn trigen(&self) -> Trigen
Trigger enable and polarity The TRIGEN bits controls whether the LPTIM counter is started by an external trigger or not. If the external trigger option is selected, three configurations are possible for the trigger active edge:.
pub fn set_trigen(&mut self, val: Trigen)
pub fn set_trigen(&mut self, val: Trigen)
Trigger enable and polarity The TRIGEN bits controls whether the LPTIM counter is started by an external trigger or not. If the external trigger option is selected, three configurations are possible for the trigger active edge:.
pub fn set_timout(&mut self, val: bool)
pub fn set_timout(&mut self, val: bool)
Timeout enable The TIMOUT bit controls the Timeout feature.
pub const fn preload(&self) -> bool
pub const fn preload(&self) -> bool
Registers update mode The PRELOAD bit controls the LPTIM_ARR, LPTIM_RCR and the LPTIM_CCRx registers update modality.
pub fn set_preload(&mut self, val: bool)
pub fn set_preload(&mut self, val: bool)
Registers update mode The PRELOAD bit controls the LPTIM_ARR, LPTIM_RCR and the LPTIM_CCRx registers update modality.
pub const fn countmode(&self) -> ClockSource
pub const fn countmode(&self) -> ClockSource
counter mode enabled The COUNTMODE bit selects which clock source is used by the LPTIM to clock the counter:.
pub fn set_countmode(&mut self, val: ClockSource)
pub fn set_countmode(&mut self, val: ClockSource)
counter mode enabled The COUNTMODE bit selects which clock source is used by the LPTIM to clock the counter:.
Trait Implementations§
impl Copy for Cfgr
impl Eq for Cfgr
impl StructuralPartialEq for Cfgr
Auto Trait Implementations§
impl Freeze for Cfgr
impl RefUnwindSafe for Cfgr
impl Send for Cfgr
impl Sync for Cfgr
impl Unpin for Cfgr
impl UnwindSafe for Cfgr
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)